default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDSuresh Purini
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2024
[i2]Shashwat Khandelwal, Ziaul Choudhury, Shashwat Shrivastava, Suresh Purini:
Accelerating local laplacian filters on FPGAs. CoRR abs/2402.12407 (2024)- 2023
- [j5]Ziaul Choudhury
, Anish Gulati, Suresh Purini:
FlowPix: Accelerating Image Processing Pipelines on an FPGA Overlay using a Domain Specific Compiler. ACM Trans. Archit. Code Optim. 20(4): 60:1-60:25 (2023) - [c29]Kunal Jain, Kishan Sairam Adapa, Kunwar Grover, Ravi Kiran Sarvadevabhatla, Suresh Purini:
A Cloud-Fog Architecture for Video Analytics on Large Scale Camera Networks Using Semantic Scene Analysis. CCGrid 2023: 513-523 - [c28]Vaibhav Kashera, Siddhant Jain, Abhishek Banerjee, Suresh Purini:
Building Low-Latency Order Books with Hybrid Binary-Linear Search Data Structures on FPGAs. FPL 2023: 299-304 - [c27]Shaarada D. Yamini, Mirishkar Sai Ganesh, Anil Kumar Vuppala, Suresh Purini:
Hardware Accelerator for Transformer based End-to-End Automatic Speech Recognition System. IPDPS Workshops 2023: 93-100 - 2022
- [j4]Ziaul Choudhury, Shashwat Shrivastava, Lavanya Ramapantulu, Suresh Purini:
An FPGA Overlay for CNN Inference with Fine-grained Flexible Parallelism. ACM Trans. Archit. Code Optim. 19(3): 34:1-34:26 (2022) - [c26]Prithvi Velicheti, Sivani Pentapati, Suresh Purini:
Systolic Array based FPGA accelerator for Yolov3-tiny. HPEC 2022: 1-2 - [c25]Shivani Maurya, Ziaul Choudhury, Suresh Purini:
Accuracy Configurable FPGA Implementation of Harris Corner Detection. ISVLSI 2022: 422-427 - 2021
- [j3]Yash Khandelwal, Arushi Dogra, Karthik Ganti, Suresh Purini, Puduru V. Reddy:
Pricing strategies of an oligopolist in federated cloud markets. J. Cloud Comput. 10(1): 54 (2021) - 2020
- [c24]Suresh Purini, Vinamra Benara, Ziaul Choudhury, Uday Bondhugula:
Bitwidth customization in image processing pipelines using interval analysis and SMT solvers. CC 2020: 167-178 - [c23]Shashwat Khandelwal, Ziaul Choudhury, Shashwat Shrivastava, Suresh Purini:
Accelerating Local Laplacian Filters on FPGAs. FPL 2020: 109-114 - [c22]Shashwat Shrivastava, Ziaul Choudhury, Shashwat Khandelwal, Suresh Purini:
FPGA Accelerator for Stereo Vision using Semi-Global Matching through Dependency Relaxation. FPL 2020: 304-309 - [c21]Surya Teja Palavalasa, Yuvraj Singh, Adhish Singla, Suresh Purini, Venkatesh Choppella:
Model Checking as a Service using Dynamic Resource Scaling. HiPC 2020: 131-140
2010 – 2019
- 2018
- [c20]Yash Khandelwal, Karthik Ganti, Suresh Purini, Puduru V. Reddy:
Cloud Federation Formation in Oligopolistic Markets. Euro-Par 2018: 392-403 - [c19]Shaleen Garg, Kishore Kothapalli, Suresh Purini:
Share-a-GPU: Providing Simple and Effective Time-Sharing on GPUs. HiPC 2018: 294-303 - [c18]Deepak Awasthi, Syed Azeemuddin, Suresh Purini, Annesha Mazumder:
Flow Sensor IoT Node for Wi-Fi Equipped Apartments and Gated Communities. IEEE SENSORS 2018: 1-4 - [c17]Shrenik Jain, Suresh Purini, Puduru V. Reddy:
A Multi-Cloud Marketplace Model with Multiple Brokers for IaaS Layer and Generalized Stable Matching. UCC 2018: 257-266 - [i1]Vinamra Benara, Sahithi Rampalli, Ziaul Choudhury, Suresh Purini, Uday Bondhugula:
Synthesizing Power and Area Efficient Image Processing Pipelines on FPGAs using Customized Bit-widths. CoRR abs/1803.02660 (2018) - 2017
- [c16]Jitendra Yasaswi, Suresh Purini, C. V. Jawahar:
Plagiarism Detection in Programming Assignments Using Deep Features. ACPR 2017: 652-657 - [c15]Jitendra Yasaswi, Sri Kailash, Anil Chilupuri, Suresh Purini, C. V. Jawahar:
Unsupervised Learning Based Approach for Plagiarism Detection in Programming Assignments. ISEC 2017: 117-121 - 2016
- [c14]Nitin Chugh, Vinay Vasista, Suresh Purini, Uday Bondhugula:
A DSL Compiler for Accelerating Image Processing Pipelines on FPGAs. PACT 2016: 327-338 - [c13]Ronak Kogta, Suresh Purini, Ajit Mathew:
Re-targeting Optimization Sequences from Scalar Processors to FPGAs in HLS compilers (Abstract Only). FPGA 2016: 276 - [c12]Nehal J. Wani, Sharada Prasanna Mohanty, Suresh Purini, Dipti Misra Sharma:
Anuvaad Pranaali: A RESTful API for Machine Translation. ICSOC Workshops 2016: 179-183 - [c11]Ziaul Choudhury, Suresh Purini, Shiva Rama Krishna:
A Hybrid CPU+GPU Working-Set Dictionary. ISPDC 2016: 56-63 - [c10]Adhish Singla, Krishnaji Desai, Suresh Purini, Venkatesh Choppella:
Distributed Safety Verification Using Vertex Centric Programming Model. ISPDC 2016: 114-120 - [c9]Vinamra Benara, Suresh Purini:
Accurus: A Fast Convergence Technique for Accuracy Configurable Approximate Adder Circuits. ISVLSI 2016: 577-582 - [c8]Yash Khandelwal, Suresh Purini, Puduru V. Reddy:
Fast algorithms for optimal coalition formation in federated clouds. UCC 2016: 156-164 - 2015
- [c7]Kapil Kumar, Nehal J. Wani, Suresh Purini:
Dynamic Memory and Core Scaling in Virtual Machines. CLOUD 2015: 269-276 - 2014
- [c6]Sanidhya Kashyap, Jaspal Singh Dhillon, Suresh Purini:
RLC - A Reliable Approach to Fast and Efficient Live Migration of Virtual Machines in the Clouds. IEEE CLOUD 2014: 360-367 - 2013
- [j2]Suresh Purini, Lakshya Jain:
Finding good optimization sequences covering program space. ACM Trans. Archit. Code Optim. 9(4): 56:1-56:23 (2013) - [c5]Jaspal Singh Dhillon, Suresh Purini, Sanidhya Kashyap:
Virtual Machine Coscheduling: A Game Theoretic Approach. UCC 2013: 227-234 - 2010
- [j1]Bharghava Rajaram, Abinesh Ramachandran, Suresh Purini, R. Govindatajulu:
Design of Low Power Systems Using Inexact Logic Circuits. J. Low Power Electron. 6(3): 401-414 (2010) - [c4]Bharghava Rajaram, Abinesh Ramachandran, Suresh Purini, Govindarajulu Regeti:
Inexact Decision Circuits: An Application to Hamming Weight Threshold Voting. VLSI Design 2010: 158-163 - [c3]Abinesh Ramachandran, Bharghava Rajaram, Suresh Purini, Govindarajulu Regeti:
Transition Inversion Based Low Power Data Coding Scheme for Buffered Data Transfer. VLSI Design 2010: 164-169
2000 – 2009
- 2008
- [c2]Richard Chang, Suresh Purini:
Amplifying ZPP^SAT[1] and the Two Queries Problem. CCC 2008: 41-52 - 2007
- [c1]Richard Chang, Suresh Purini:
Bounded Queries and the NP Machine Hypothesis. CCC 2007: 52-59
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-08-05 21:14 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
