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Felipe Cabarcas
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2010 – 2019
- 2019
- [j8]Felipe Cabarcas
, Daniel Cabarcas, John Baena:
Efficient public-key operation in multivariate schemes. Adv. Math. Commun. 13(2): 343-371 (2019) - 2012
- [j7]Alejandro Rico, Felipe Cabarcas
, Carlos Villavieja, Milan Pavlovic, Augusto Vega, Yoav Etsion, Alex Ramírez, Mateo Valero
:
On the simulation of large-scale architectures using multiple application abstraction levels. ACM Trans. Archit. Code Optim. 8(4): 36:1-36:20 (2012) - [j6]Nikola Vujic, Felipe Cabarcas
, Marc González Tallada, Alex Ramírez, Xavier Martorell
, Eduard Ayguadé
:
DMA++: On the Fly Data Realignment for On-Chip Memories. IEEE Trans. Computers 61(2): 237-250 (2012) - 2011
- [b1]Felipe Cabarcas:
Castell: a heterogeneous cmp architecture scalable to hundreds of processors. Polytechnic University of Catalonia, Spain, 2011 - [j5]Friman Sánchez, Felipe Cabarcas
, Alex Ramírez, Mateo Valero
:
Scalable multicore architectures for long DNA sequence comparison. Concurr. Comput. Pract. Exp. 23(17): 2205-2219 (2011) - [c11]Sebastián Isaza, Friman Sánchez, Felipe Cabarcas
, Alex Ramírez, Georgi Gaydadjiev
:
Parametrizing multicore architectures for multiple sequence alignment. Conf. Computing Frontiers 2011: 31 - [c10]Alejandro Rico, Alejandro Duran, Felipe Cabarcas
, Yoav Etsion, Alex Ramírez, Mateo Valero
:
Trace-driven simulation of multithreaded applications. ISPASS 2011: 87-96 - [c9]Augusto Vega, Felipe Cabarcas
, Alex Ramírez, Mateo Valero
:
Breaking the bandwidth wall in chip multiprocessors. ICSAMOS 2011: 255-262 - 2010
- [j4]Alex Ramírez, Felipe Cabarcas
, Ben H. H. Juurlink, Mauricio Alvarez-Mesa, Friman Sánchez, Arnaldo Azevedo, Cor Meenderinck, Catalin Bogdan Ciobanu
, Sebastián Isaza, Georgi Gaydadjiev
:
The SARC Architecture. IEEE Micro 30(5): 16-29 (2010) - [c8]Friman Sánchez, Felipe Cabarcas
, Alex Ramírez, Mateo Valero
:
Long DNA Sequence Comparison on Multicore Architectures. Euro-Par (2) 2010: 247-259 - [c7]Nikola Vujic, Marc González, Felipe Cabarcas, Alex Ramírez, Xavier Martorell, Eduard Ayguadé:
DMA++: on the fly data realignment for on-chip memories. HPCA 2010: 1-12 - [c6]Augusto Vega, Alejandro Rico, Felipe Cabarcas
, Alex Ramírez, Mateo Valero
:
Comparing last-level cache designs for CMP architectures. IFMT 2010: 2:1-2:11 - [c5]Yoav Etsion, Felipe Cabarcas
, Alejandro Rico, Alex Ramírez, Rosa M. Badia
, Eduard Ayguadé
, Jesús Labarta
, Mateo Valero
:
Task Superscalar: An Out-of-Order Task Pipeline. MICRO 2010: 89-100 - [c4]Felipe Cabarcas
, Alejandro Rico, Yoav Etsion, Alex Ramírez:
Interleaving granularity on high bandwidth memory architecture for CMPs. ICSAMOS 2010: 250-257
2000 – 2009
- 2009
- [j3]Pieter Bellens, Josep M. Pérez, Felipe Cabarcas
, Alex Ramírez, Rosa M. Badia
, Jesús Labarta
:
CellSs: Scheduling techniques to better exploit memory hierarchy. Sci. Program. 17(1-2): 77-95 (2009) - 2006
- [j2]Javier Garcia-Frías
, Felipe Cabarcas
:
Approaching the Slepian-Wolf boundary using practical channel codes. Signal Process. 86(11): 3096-3101 (2006) - [j1]Felipe Cabarcas
, Richard Demo Souza
, Javier Garcia-Frías
:
Turbo coding of strongly nonuniform memoryless sources with unequal energy allocation and PAM signaling. IEEE Trans. Signal Process. 54(5): 1942-1946 (2006) - 2004
- [c3]Felipe Cabarcas, Richard Demo Souza
, Javier Garcia-Frías:
Source-controlled turbo coding of nonuniform memoryless sources based on unequal energy allocation. ISIT 2004: 166 - [c2]Javier Garcia-Frías, Felipe Cabarcas:
Approaching the slepian-wolf boundary using practical channel codes. ISIT 2004: 330 - 2001
- [c1]Felipe Cabarcas, Javier Garcia-Frías:
Asymmetric energy allocation strategies to improve turbo codes performance. VTC Fall 2001: 1839-1842
Coauthor Index
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