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ORCIDAkihiko Yamada
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2020 – today
- 2023
[c17]Akihiko Yamada, Satoshi Denno, Yafei Hou:
Iterative User Scheduling Method for MU-MIMO-OFDM Systems. GCCE 2023: 168-169
2010 – 2019
- 2019
- [j10]Akihiko Yamada:
Parametron and Relay Computers Exhibition Held at Tokyo University of Science in November, 2018. IEEE Ann. Hist. Comput. 41(1): 61-63 (2019) - [j9]Akihiko Yamada:
2018 NEC C&C Prize Ceremony. IEEE Ann. Hist. Comput. 41(2): 64-66 (2019) - [c16]Radomir S. Stankovic, Tsutomu Sasao, Jaakko T. Astola, Akihiko Yamada:
Remarks on the Design of First Digital Computers in Japan - Contributions of Yasuo Komamiya. EUROCAST (1) 2019: 123-130 - 2018
- [j8]Akihiko Yamada:
IPSJ Certifies 100 IP Technology Heritage Artifacts in 10 Years. IEEE Ann. Hist. Comput. 40(3): 105-112 (2018) - 2012
- [j7]Akihiko Yamada, Dag Spicer
:
Events and Sightings. IEEE Ann. Hist. Comput. 34(3): 70-73 (2012)
2000 – 2009
- 2008
- [j6]Chigusa Kita, Thomas Haigh, Dag Spicer, Akihiko Yamada, Thomas J. Misa:
Events and Sightings. IEEE Ann. Hist. Comput. 30(2): 64-67 (2008) - [c15]Xian-Hua Han, Yen-Wei Chen, Akihiko Yamada, Hideto Fujita:
Robust Face Recognition Based on Modified ICA without Training Sample of Test Subjects. IIH-MSP 2008: 701-704 - 2007
- [j5]Chigusa Kita, Dag Spicer, Anne Fitzpatrick, Akihiko Yamada:
Events and Sightings. IEEE Ann. Hist. Comput. 29(2): 66-69 (2007) - 2006
- [j4]Akihiko Yamada, Takeo Kanade:
Multi-subregion-based probabilistic approach to pose-invariant face recognition. Syst. Comput. Jpn. 37(8): 68-76 (2006) - 2003
- [c14]Takeo Kanade, Akihiko Yamada:
Multi-subregion based probabilistic approach toward pose-invariant face recognition. CIRA 2003: 954-959
1990 – 1999
- 1999
- [j3]Shogo Muramatsu, Akihiko Yamada, Hitoshi Kiya:
A design method of multidimensional linear-phase paraunitary filter banks with a lattice structure. IEEE Trans. Signal Process. 47(3): 690-700 (1999) - 1998
- [c13]Shogo Muramatsu, Akihiko Yamada, Hitoshi Kiya:
A design method OF 2-D axial-symmetric paraunitary filter banks with a lattice structure. EUSIPCO 1998: 1-4 - 1996
- [c12]K. Kajita, Hiroyuki Kobayashi, Shogo Muramatsu, Akihiko Yamada, Hitoshi Kiya:
A design method for oversampled paraunitary DFT filter banks using householder factorization. EUSIPCO 1996: 1-4 - 1990
- [c11]Akihiko Yamada:
Challenge of design and test of ultra-large-scale circuits. ITC 1990: 23
1980 – 1989
- 1989
- [j2]Shigehiro Funatsu, Masato Kawai, Akihiko Yamada:
Scan design at NEC. IEEE Des. Test 6(3): 50-51 (1989) - [j1]Shigeru Takasaki, Fumiyasu Hirose, Akihiko Yamada:
Logic simulation engines in Japan. IEEE Des. Test 6(5): 40-49 (1989) - [c10]Akihiko Yamada:
Design Automation for Large Mainframes and Supercomputers in NEC. IFIP Congress 1989: 531 - 1982
- [c9]Minoru Nomura, Shinichi Sato, Nobuo Takano, Toshinori Aoyama, Akihiko Yamada:
Timing verification system based on delay time hierarchical nature. DAC 1982: 622-628 - [c8]Kazutoshi Takahashi, Etsuo Takahashi, Tatsushige Bitoh, Toshinori Aoyama, Akihiko Yamada:
MDS: An improved total system for firmware development. MICRO 1982: 50-56 - 1981
- [c7]Akihiko Yamada:
Design automation status in Japan. DAC 1981: 43-50 - [c6]Tohru Sasaki, Akihiko Yamada, Toshinori Aoyama, Katsutoshi Hasegawa, Shunichi Kato, Shinichi Sato:
Hierarchical design verification for large digital systems. DAC 1981: 105-112 - [c5]Shigeru Takasaki, Masato Kawai, Shigehiro Funatsu, Akihiko Yamada:
A Calculus of Testability Measure at the Functional Level. ITC 1981: 95-101 - 1980
- [c4]Tohru Sasaki, Akihiko Yamada, Shunichi Kato, Terufumi Nakazawa, Kyoji Tomita, Nobuyoshi Nomizu:
MIXS: A mixed level simulator for large digital system logic verification. DAC 1980: 626-633
1970 – 1979
- 1978
- [c3]Akihiko Yamada, Nobuo Wakatsuki, T. Fukui, Shigehiro Funatsu:
Automatic System Level Test Generation and Fault Location for Large Digital Systems. DAC 1978: 347-352 - 1977
- [c2]Akihiko Yamada, Nobuo Wakatsuki, Hideo Shibano, Osamu Itoh, Kyoji Tomita, Shigehiro Funatsu:
Automatic test generation for large digital circuits. DAC 1977: 78-83 - 1974
- [c1]Akihiko Yamada, Akihiro Kawaguchi, Kazutoshi Takahashi, Shunichi Kato:
Microprogramming Design support System. DAC 1974: 137-142
Coauthor Index
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