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Mizue Ishikawa

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2010 – 2019

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2018
[c2]
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  dblp key:
  - conf/vlsic/ShimomuraYIKSKO18
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  - https://dblp.org/rec/conf/vlsic/ShimomuraYIKSKO18
Naoharu Shimomura, Hiroaki Yoda, Tomoaki Inokuchi, Katsuhiko Koi, Hideyuki Sugiyama, Yushi Kato, Yuichi Ohsawa, Altansargai Buyandalai, Satoshi Shirotori, Soichi Oikawa, Mariko Shimizu, Mizue Ishikawa, Tiwari Ajay, Atsushi Kurobe:
High-Speed Voltage Control Spintronics Memory (VoCSM) Having Broad Design Windows. VLSI Circuits 2018: 83-84
2017
[c1]
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  - conf/nvmts/SugiyamaYKOAISS17
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Hideyuki Sugiyama, Hiroaki Yoda, Katsuhiko Koi, Soichi Oikawa, Buyandalai Altansargai, Tomoaki Inokuchi, Satoshi Shirotori, Mariko Shimizu, Yuichi Kato, Yuichi Ohsawa, Mizue Ishikawa, Ajay Tiwari, Naoharu Shimomura, Yoshiaki Saito, Atsushi Kurobe:
High-speed voltage-control spintronics memory focused on reduction in write current. NVMTS 2017: 1-5
2011
[i1]
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  - journals/corr/abs-1104-1493
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Tetsufumi Tanamoto, Hideyuki Sugiyama, Tomoaki Inokuchi, Takao Marukame, Mizue Ishikawa, Kazutaka Ikegami, Yoshiaki Saito:
Scalability of spin FPGA: A Reconfigurable Architecture based on spin MOSFET. CoRR abs/1104.1493 (2011)

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