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ORCIDAbhijit Das 0002
Person information
- affiliation: Indian Institute of Technology Guwahati, Assam, India
Other persons with the same name
- Abhijit Das — disambiguation page
- Abhijit Das 0001
![[0000-0002-6793-0582]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0002-6793-0582")
— Indian Statistical Institute, Kolkata, India (and 1 more) - Abhijit Das 0003 — AMRI Institute of Neurosciences Kolkata, India
- Abhijit Das 0004 — Indian Institute of Technology Kharagpur, India
- Abhijit Das 0005 — University of Texas at Arlington, Fort Worth, TX, USA
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2020 – today
- 2024
[j6]Abhijit Das, Maurizio Palesi, John Kim, Partha Pratim Pande:
Guest Editorial Chip and Package-Scale Communication-Aware Architectures for General-Purpose, Domain-Specific, and Quantum Computing Systems. IEEE J. Emerg. Sel. Topics Circuits Syst. 14(3): 349-353 (2024)- [j5]Abhijit Das, Maurizio Palesi, John Kim, Partha Pratim Pande:
Chip and Package-Scale Interconnects for General-Purpose, Domain-Specific, and Quantum Computing Systems - Overview, Challenges, and Opportunities. IEEE J. Emerg. Sel. Topics Circuits Syst. 14(3): 354-370 (2024) - [j4]Abhijit Das, Enrico Russo, Maurizio Palesi:
Multi-Objective Hardware-Mapping Co-Optimisation for Multi-DNN Workloads on Chiplet-Based Accelerators. IEEE Trans. Computers 73(8): 1883-1898 (2024) - 2023
- [c10]Maurizio Palesi, Enrico Russo, Abhijit Das, John Jose:
Wireless enabled Inter-Chiplet Communication in DNN Hardware Accelerators. IPDPS Workshops 2023: 477-483 - 2022
- [j3]Abhijit Das, Abhishek Kumar, John Jose, Maurizio Palesi:
Revising NoC in Future Multicore-Based Consumer Electronics for Performance. IEEE Consumer Electron. Mag. 11(3): 79-86 (2022) - [c9]Manju Rajan, Abhijit Das, John Jose:
LOKI: A Hardware Trojan Affecting Multiple Components of an SoC. ISVLSI 2022: 176-181 - [c8]Abhijit Das, John Jose:
Designing Data-Aware Network-on-Chip for Performance. ISVLSI 2022: 428-433 - [i2]Abhijit Das, Enrico Russo, Maurizio Palesi:
Multi-Objective Hardware-Mapping Co-Optimisation for Multi-Tenant DNN Accelerators. CoRR abs/2210.14657 (2022) - 2021
- [j2]Abhijit Das, Abhishek Kumar, John Jose, Maurizio Palesi:
Opportunistic Caching in NoC: Exploring Ways to Reduce Miss Penalty. IEEE Trans. Computers 70(6): 892-905 (2021) - [j1]Abhijit Das, John Jose, Prabhat Mishra:
Data Criticality in Multithreaded Applications: An Insight for Many-Core Systems. IEEE Trans. Very Large Scale Integr. Syst. 29(9): 1675-1679 (2021) - [i1]Abhijit Das, John Jose, Prabhat Mishra:
Data Criticality in Multi-Threaded Applications: An Insight for Many-Core Systems. CoRR abs/2101.00055 (2021) - 2020
- [c7]Abhijit Das, Abhishek Kumar, John Jose:
Reducing Off-Chip Miss Penalty by Exploiting Underutilised On-Chip Router Buffers. ICCD 2020: 230-238 - [c6]Abhijit Das, Abhishek Kumar, John Jose, Maurizio Palesi:
Exploiting On-Chip Routers to Store Dirty Cache Blocks in Tiled Chip Multi-processors. ISVLSI 2020: 147-152 - [c5]Manju Rajan, Abhijit Das, John Jose, Prabhat Mishra:
SECTAR: Secure NoC using Trojan Aware Routing. NOCS 2020: 1-8
2010 – 2019
- 2018
- [c4]Abhijit Das, Sarath Babu, John Jose, Sangeetha Jose, Maurizio Palesi:
Critical Packet Prioritisation by Slack-Aware Re-Routing in On-Chip Networks. NOCS 2018: 12:1-12:8 - [c3]John Jose, Abhijit Das:
An Adaptive Deflection Router with Dual Injection and Ejection Units for Mesh NoCs. VLSID 2018: 374-379 - 2017
- [c2]N. S. Aswathy, R. S. Reshma Raj, Abhijit Das, John Jose, V. R. Josna:
Adaptive Packet Throttling Technique for Congestion Management in Mesh NoCs. VDAT 2017: 337-344 - [c1]R. S. Reshma Raj, Abhijit Das, John Jose:
Implementation and analysis of hotspot mitigation in mesh NoCs by cost-effective deflection routing technique. VLSI-SoC 2017: 1-6
Coauthor Index
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