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Chenglong Zou
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2020 – today
- 2024
- [j10]Kefei Liu
, Jingjie Shang, Xiaoxin Cui
, Chenglong Zou
, Yisong Kuang
, Kanglin Xiao
, Yi Zhong
, Yuan Wang
:
How the Brain Achieves Real-Time Vision: A Spiking Position Perception Model. IEEE Trans. Cogn. Dev. Syst. 16(3): 961-972 (2024) - 2023
- [j9]Chenglong Zou
, Xiaoxin Cui, Guang Chen, Yuanyuan Jiang, Yuan Wang
:
Toward a Lossless Conversion for Spiking Neural Networks with Negative-Spike Dynamics. Adv. Intell. Syst. 5(12) (2023) - [j8]Kefei Liu
, Xiaoxin Cui
, Xiang Ji, Yisong Kuang
, Chenglong Zou
, Yi Zhong, Kanglin Xiao
, Yuan Wang
:
Real-Time Target Tracking System With Spiking Neural Networks Implemented on Neuromorphic Chips. IEEE Trans. Circuits Syst. II Express Briefs 70(4): 1590-1594 (2023) - 2022
- [j7]Chenglong Zou
, Xiaoxin Cui, Guang Chen, Shuo Feng, Kefei Liu, Xinan Wang, Yuan Wang:
Modular building blocks for mapping spiking neural networks onto a programmable neuromorphic processor. Microelectron. J. 129: 105612 (2022) - [j6]Yisong Kuang
, Xiaoxin Cui
, Zilin Wang, Chenglong Zou
, Yi Zhong, Kefei Liu, Zhenhui Dai, Dunshan Yu, Yuan Wang
, Ru Huang:
ESSA: Design of a Programmable Efficient Sparse Spiking Neural Network Accelerator. IEEE Trans. Very Large Scale Integr. Syst. 30(11): 1631-1641 (2022) - [c10]Kefei Liu, Xiaoxin Cui, Chenglong Zou
, Yisong Kuang, Yi Zhong, Kanglin Xiao, Yuan Wang:
A Full-Neuron Memory Model Designed for Neuromorphic Systems. AICAS 2022: 138-141 - [c9]Chenglong Zou
, Xiaoxin Cui, Yisong Kuang, Yuan Wang, Xinan Wang:
A Hybrid Spiking Recurrent Neural Network on Hardware for Efficient Emotion Recognition. AICAS 2022: 332-335 - [c8]Yisong Kuang, Xiaoxin Cui, Chenglong Zou
, Yi Zhong, Zhenhui Dai, Zilin Wang, Kefei Liu, Dunshan Yu, Yuan Wang:
An Event-driven Spiking Neural Network Accelerator with On-chip Sparse Weight. ISCAS 2022: 3468-3472 - 2021
- [j5]Qingyun Zou, Xiaoxin Cui, Zhenhui Dai, Yisong Kuang, Yi Zhong, Chenglong Zou
, Xiaole Cui:
28nm asynchronous area-saving AES processor with high Common and Machine learning side-channel attack resistance. IEICE Electron. Express 18(20): 20210309 (2021) - [j4]Yisong Kuang
, Xiaoxin Cui
, Yi Zhong, Kefei Liu
, Chenglong Zou
, Zhenhui Dai, Yuan Wang
, Dunshan Yu, Ru Huang:
A 64K-Neuron 64M-1b-Synapse 2.64pJ/SOP Neuromorphic Chip With All Memory on Chip for Spike-Based Models in 65nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 68(7): 2655-2659 (2021) - [c7]Yisong Kuang, Xiaoxin Cui, Yi Zhong, Kefei Liu, Chenglong Zou
, Zhenhui Dai, Dunshan Yu, Yuan Wang, Ru Huang:
A 28-nm 0.34-pJ/SOP Spike-Based Neuromorphic Processor for Efficient Artificial Neural Network Implementations. ISCAS 2021: 1-5 - 2020
- [c6]Chenglong Zou
, Xiaoxin Cui, Jiexian Ge, Hanghang Ma, Xin'an Wang:
A Novel Conversion Method for Spiking Neural Network using Median Quantization. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [c5]Jiexian Ge, Xiaoxin Cui, Kanglin Xiao, Chenglong Zou
, Yi-Hsiang Chen, Rongshan Wei:
BNReLU: Combine Batch Normalization and Rectified Linear Unit to Reduce Hardware Overhead. ASICON 2019: 1-4 - [c4]Chenglong Zou
, Xin'an Wang, Boxing Xu, Yisong Kuang, Xiaoxin Cui:
Deep Spiking Convolutional Neural Networks for Programmable Neuro-synaptic System. ASICON 2019: 1-4 - 2018
- [j3]Raúl Gracia Tinedo
, Chenglong Zou, Marc Sánchez Artigas
, Pedro García López
:
BenchBox: A User-Driven Benchmarking Framework for Fat-Client Storage Systems. IEEE Trans. Parallel Distributed Syst. 29(10): 2191-2205 (2018) - 2017
- [c3]Qiang Chen, Chen Xin, Chenglong Zou
, Xin'an Wang, Bo Wang:
A low bit-width parameter representation method for hardware-oriented convolution neural networks. ASICON 2017: 148-151 - [c2]Chen Xin, Qiang Chen, Miren Tian, Mohan Ji, Chenglong Zou
, Xin'an Wang, Bo Wang:
COSY: An Energy-Efficient Hardware Architecture for Deep Convolutional Neural Networks Based on Systolic Array. ICPADS 2017: 180-189 - 2014
- [j2]Janusz A. Brzozowski, Galina Jirásková
, Chenglong Zou:
Quotient Complexity of Closed Languages. Theory Comput. Syst. 54(2): 277-292 (2014) - 2012
- [j1]Joseph Cheriyan, Chenglong Zou:
On orienting graphs for connectivity: Projective planes and Halin graphs. Oper. Res. Lett. 40(5): 337-341 (2012) - 2010
- [c1]Janusz A. Brzozowski, Galina Jirásková
, Chenglong Zou:
Quotient Complexity of Closed Languages. CSR 2010: 84-95
2000 – 2009
- 2009
- [i1]Janusz A. Brzozowski, Galina Jirásková, Chenglong Zou:
Quotient Complexity of Closed Languages. CoRR abs/0912.1034 (2009)
Coauthor Index
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last updated on 2024-08-05 21:11 CEST by the dblp team
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