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2010 – 2019
- 2013
[c9]Takao Toi, Noritsugu Nakamura, Taro Fujii, Toshiro Kitaoka, Katsumi Togawa, Koichiro Furuta, Toru Awashima:
Optimizing time and space multiplexed computation in a dynamically reconfigurable processor. FPT 2013: 106-111- 2011
- [j3]Takao Toi, Takumi Okamoto, Toru Awashima, Kazutoshi Wakabayashi, Hideharu Amano:
Iterative Synthesis Methods Estimating Programmable-Wire Congestion in a Dynamically Reconfigurable Processor. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 94-A(12): 2619-2627 (2011) - [c8]Masato Motomura, Takafumi Aoki, Toru Awashima, Toru Baji, Masaaki Ishikawa:
Panel discussions: Impact on society by fusion and harmony of mobile devices, servers, and networks - Their direction of evolutions and optimal roles. COOL Chips 2011: 1-2 - 2010
- [j2]Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, Toru Awashima, Kazutoshi Wakabayashi:
High-level Synthesis Challenges for Mapping a Complete Program on a Dynamically Reconfigurable Processor. Inf. Media Technol. 5(2): 398-411 (2010) - [j1]Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, Toru Awashima, Kazutoshi Wakabayashi:
High-level Synthesis Challenges for Mapping a Complete Program on a Dynamically Reconfigurable Processor. IPSJ Trans. Syst. LSI Des. Methodol. 3: 91-104 (2010) - [c7]Takao Toi, Takumi Okamoto, Toru Awashima, Kazutoshi Wakabayashi, Hideharu Amano:
Wire congestion aware synthesis for a dynamically reconfigurable processor. FPT 2010: 300-303
2000 – 2009
- 2006
- [c6]Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, Toru Awashima, Kazutoshi Wakabayashi, Li Jing:
High-level synthesis challenges and solutions for a dynamically reconfigurable processor. ICCAD 2006: 702-708 - 2005
- [c5]Katsuaki Deguchi, Shohei Abe, Masayasu Suzuki, Kenichiro Anjo, Toru Awashima, Hideharu Amano:
Implementing core tasks of JPEG2000 Encoder on the Dynamically Reconfigurable Processor. ARCS Workshops 2005: 12-18 - [c4]Yohei Hasegawa, Shohei Abe, Hiroki Matsutani, Hideharu Amano, Kenichiro Anjo, Toru Awashima:
An Adaptive Cryptographic Accelerator for IPsec on Dynamically Reconfigurable Processor. FPT 2005: 163-170 - 2004
- [c3]Noriaki Suzuki, Shunsuke Kurotaki, Masayasu Suzuki, Naoto Kaneko, Yutaka Yamada, Katsuaki Deguchi, Yohei Hasegawa, Hideharu Amano, Kenichiro Anjo, Masato Motomura
, Kazutoshi Wakabayashi, Takeo Toi, Toru Awashima:
Implementing and Evaluating Stream Applications on the Dynamically Reconfigurable Processor. FCCM 2004: 328-329 - [c2]Masayasu Suzuki, Yohei Hasegawa, Yutaka Yamada, Naoto Kaneko, Katsuaki Deguchi, Hideharu Amano, Kenichiro Anjo, Masato Motomura, Kazutoshi Wakabayashi, Takao Toi, Toru Awashima:
Stream applications on the dynamically reconfigurable processor. FPT 2004: 137-144
1990 – 1999
- 1992
- [c1]Toru Awashima, Wataru Yamamoto, Masao Sato, Tatsuo Ohtsuki:
An optimal chip compaction method based on shortest path algorithm with automatic jog insertion. ICCAD 1992: 162-165
Coauthor Index
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