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Jiangmin Gu
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Journal Articles
- 2005
- [j2]Chip-Hong Chang
, Jiangmin Gu, Mingyan Zhang:
A review of 0.18-μm full adder performances for tree structured arithmetic circuits. IEEE Trans. Very Large Scale Integr. Syst. 13(6): 686-695 (2005) - 2004
- [j1]Chip-Hong Chang
, Jiangmin Gu, Mingyan Zhang:
Ultra low-voltage low-power CMOS 4-2 and 5-2 compressors for fast arithmetic circuits. IEEE Trans. Circuits Syst. I Regul. Pap. 51-I(10): 1985-1997 (2004)
Conference and Workshop Papers
- 2023
- [c11]Xuan Chi, Yubo Wang, Fan Li, Yixiao Huang, Chenruiyuan Yu, Shiqiang Wu, Huiqing Wen, Jiangmin Gu, Ping Zhang, Wen Liu:
The Investigation of Source Field Plate on the Performance of pGaN Gate Device and Dual-Gate Bidirectional Switch using TCAD Simulation. ICICDT 2023: 148-151 - 2011
- [c10]Renjing Pan, Jiangmin Gu, Kiat Seng Yeo, Wei Meng Lim, Kaixue Ma:
SiGe BiCMOS power amplifiers for 60GHz ISM band applications. ISOCC 2011: 13-16 - [c9]Jinna Yan, Kok Meng Lim, Jiangmin Gu, Keping Wang, Wei Meng Lim, Kaixue Ma, Kiat Seng Yeo:
A double-quadrature down-conversion mixer in 0.18 μm SiGe BiCMOS process. ISOCC 2011: 246-249 - [c8]Kok Meng Lim, Jiangmin Gu, Jinna Yan, Wei Meng Lim, Yang Lu, Kiat Seng Yeo:
Ultra low power active 60 GHz Bi-CMOS down-conversion mixer. ISOCC 2011: 254-257 - 2010
- [c7]Kok Meng Lim, Jiangmin Gu, Yang Lu, Jinna Yan, Wei Meng Lim, Kaixue Ma, Kiat Seng Yeo:
Low power millimeter wave active sige sub-harmonic up-conversion mixer with ultra low driving power. ICECS 2010: 511-514 - 2005
- [c6]Yajuan He, Chip-Hong Chang
, Jiangmin Gu, Hossam A. H. Fahmy:
A novel covalent redundant binary Booth encoder. ISCAS (1) 2005: 69-72 - [c5]Yajuan He, Chip-Hong Chang
, Jiangmin Gu:
An area efficient 64-bit square root carry-select adder for low power applications. ISCAS (4) 2005: 4082-4085 - 2003
- [c4]Jiangmin Gu, Chip-Hong Chang:
Low voltage, low power (5: 2) compressor cell for fast arithmetic circuits. ICASSP (2) 2003: 661-664 - [c3]Mingyan Zhang, Jiangmin Gu, Chip-Hong Chang:
A novel hybrid pass logic with static CMOS output drive full-adder cell. ISCAS (5) 2003: 317-320 - [c2]Jiangmin Gu, Chip-Hong Chang:
Ultra low voltage, low power 4-2 compressor for high speed multiplications. ISCAS (5) 2003: 321-324 - 2002
- [c1]Jiangmin Gu, Chip-Hong Chang, Kiat Seng Yeo
:
An interconnect optimized floorplanning of a scalar product macrocell. ISCAS (1) 2002: 465-468
Coauthor Index
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