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ORCIDNing Chen 0006
Person information
- affiliation: TU Munich, Institute for Electronic Design Automation, Germany
Other persons with the same name
- Ning Chen — disambiguation page
- Ning Chen 0001 — InteliFusion Technologies, China (and 1 more)
- Ning Chen 0002
![[0000-0002-6742-0048]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0002-6742-0048")
— Tsinghua University, TNList / Tsinghua-Fuzhou Institute for Data Technology, Beijing, China - Ning Chen 0003 — Henan Polytechnic University, College of Computer Science and Technology, China (and 1 more)
- Ning Chen 0004 — Lehigh University, Department of Electrical and Computer Engineering, Bethlehem, PA, USA
- Ning Chen 0005 — Nanyang Technological University, Division of Mathematical Sciences, Singapore (and 1 more)
- Ning Chen 0007 — East China University of Science and Technology, School of Information Science & Engineering, Shanghai, China (and 1 more)
- Ning Chen 0008 — City University of Hong Kong, Hong Kong, SAR, China (and 2 more)
- Ning Chen 0009 — Central South University, School of Automation, Changsha, China
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2010 – 2019
- 2017
[i5]Bing Li, Ning Chen, Manuel Schmidt, Walter Schneider, Ulf Schlichtmann:
On Hierarchical Statistical Static Timing Analysis. CoRR abs/1705.04975 (2017)- [i4]Bing Li, Ning Chen, Ulf Schlichtmann:
Timing Model Extraction for Sequential Circuits Considering Process Variations. CoRR abs/1705.04976 (2017) - [i3]Bing Li, Ning Chen, Ulf Schlichtmann:
Fast Statistical Timing Analysis for Circuits with Post-Silicon Tunable Clock Buffers. CoRR abs/1705.04979 (2017) - [i2]Bing Li, Ning Chen, Ulf Schlichtmann:
Statistical Timing Analysis for Latch-Controlled Circuits with Reduced Iterations and Graph Transformations. CoRR abs/1705.04980 (2017) - [i1]Bing Li, Ning Chen, Yang Xu, Ulf Schlichtmann:
On Timing Model Extraction and Hierarchical Statistical Timing Analysis. CoRR abs/1705.04981 (2017) - 2013
- [j3]Bing Li, Ning Chen, Yang Xu, Ulf Schlichtmann:
On Timing Model Extraction and Hierarchical Statistical Timing Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(3): 367-380 (2013) - 2012
- [j2]Ning Chen, Bing Li, Ulf Schlichtmann:
Iterative timing analysis based on nonlinear and interdependent flipflop modelling. IET Circuits Devices Syst. 6(5): 330-337 (2012) - [j1]Bing Li, Ning Chen, Ulf Schlichtmann:
Statistical Timing Analysis for Latch-Controlled Circuits With Reduced Iterations and Graph Transformations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(11): 1670-1683 (2012) - 2011
- [c7]Bing Li, Ning Chen:
Fast statistical timing analysis for circuits with Post-Silicon Tunable clock buffers. ICCAD 2011: 111-117 - [c6]Ning Chen, Bing Li, Ulf Schlichtmann:
Timing Modeling of Flipflops Considering Aging Effects. PATMOS 2011: 63-72 - [c5]Ning Chen, Bing Li, Ulf Schlichtmann:
Iterative Timing Analysis Considering Interdependency of Setup and Hold Times. PATMOS 2011: 73-82 - 2010
- [c4]Bing Li, Ning Chen, Ulf Schlichtmann:
Fast statistical timing analysis of latch-controlled circuits for arbitrary clock periods. ICCAD 2010: 524-531
2000 – 2009
- 2009
- [c3]Bing Li, Ning Chen, Manuel Schmidt, Walter Schneider, Ulf Schlichtmann:
On hierarchical statistical static timing analysis. DATE 2009: 1320-1325 - [c2]Bing Li, Ning Chen, Ulf Schlichtmann:
Timing model extraction for sequential circuits considering process variations. ICCAD 2009: 333-343 - [c1]Ning Chen, Bing Li, Ulf Schlichtmann:
Sensitivity based parameter reduction for statistical analysis of circuit performance. ICECS 2009: 443-446
Coauthor Index
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