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ORCIDJohn G. Kenney
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2010 – 2019
- 2014
[c4]Jeremy Walker, John G. Kenney, Jesse Bankman, Terry Chen, Steve Harston, Kenneth Lawas, Andrew Lewine, Richard Soenneker, Michael St. Germain, Ward S. Titus, Andrew Y. Wang, Kimo Tam:
A 12.5-Gb/s self-calibrating linear phase detector-based CDR using 0.18μm SiGe BiCMOS. CICC 2014: 1-4- 2012
- [j3]Ward S. Titus, John G. Kenney:
A 5.6 GHz to 11.5 GHz DCO for Digital Dual Loop CDRs. IEEE J. Solid State Circuits 47(5): 1123-1130 (2012)
2000 – 2009
- 2006
- [j2]John G. Kenney, Declan Dalton, Eric Evans, Murat Hayri Eskiyerli, Barry Hilton, Dave Hitchcox, Terence Kwok, Daniel Mulcahy, Chris McQuilkin, Viswabharath Reddy, Siva Selvanayagam, Paul Shepherd, Ward S. Titus, Lawrence DeVito:
A 9.95-11.3-Gb/s XFP Transceiver in 0.13-$\mu{\hbox {m}}$ CMOS. IEEE J. Solid State Circuits 41(12): 2901-2910 (2006)
1990 – 1999
- 1995
- [j1]John G. Kenney, Giri Rangan, Karthik Ramamurthy, Gabor C. Temes:
An enhanced slew rate source follower. IEEE J. Solid State Circuits 30(2): 144-146 (1995) - 1993
- [c3]Giri Rangan, John G. Kenney, Karthik Ramamurthy, Gabor C. Temes:
High Speed Buffers for Op-amp Characterization. ISCAS 1993: 994-997 - [c2]Kartahik Ramamurthy, John G. Kenney, Giri Rangan:
On-chip Tests for Gain Bandwidth Product and Slew Rate. ISCAS 1993: 1341-1344
1980 – 1989
- 1988
- [c1]John G. Kenney, L. Richard Carley:
CLANS: a high-level synthesis tool for high resolution data converters. ICCAD 1988: 496-499
Coauthor Index
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