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Niladrish Chatterjee
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2020 – today
- 2022
- [j3]Yaosheng Fu, Evgeny Bolotin, Niladrish Chatterjee, David W. Nellans, Stephen W. Keckler:
GPU Domain Specialization via Composable On-Package Architecture. ACM Trans. Archit. Code Optim. 19(1): 4:1-4:23 (2022) - [c23]Mike O'Connor, Donghyuk Lee, Niladrish Chatterjee, Michael B. Sullivan, Stephen W. Keckler:
Saving PAM4 Bus Energy with SMOREs: Sparse Multi-level Opportunistic Restricted Encodings. HPCA 2022: 1001-1013 - 2021
- [c22]Oreste Villa, Daniel Lustig, Zi Yan
, Evgeny Bolotin, Yaosheng Fu, Niladrish Chatterjee, Nan Jiang, David W. Nellans:
Need for Speed: Experiences Building a Trustworthy System-Level GPU Simulator. HPCA 2021: 868-880 - [c21]Atefeh Mehrabi, Donghyuk Lee, Niladrish Chatterjee, Daniel J. Sorin, Benjamin C. Lee, Mike O'Connor
:
Learning Sparse Matrix Row Permutations for Efficient SpMM on GPU Architectures. ISPASS 2021: 48-58 - [i6]Yaosheng Fu, Evgeny Bolotin, Niladrish Chatterjee, David W. Nellans, Stephen W. Keckler:
GPU Domain Specialization via Composable On-Package Architecture. CoRR abs/2104.02188 (2021)
2010 – 2019
- 2019
- [c20]Sangkug Lym, Donghyuk Lee, Mike O'Connor
, Niladrish Chatterjee, Mattan Erez
:
DeLTA: GPU Performance Model for Deep Learning Applications with In-Depth Memory System Traffic Analysis. ISPASS 2019: 293-303 - [c19]Daichi Fujiki
, Niladrish Chatterjee, Donghyuk Lee, Mike O'Connor
:
Near-memory data transformation for efficient sparse matrix multi-vector multiplication. SC 2019: 55:1-55:17 - [i5]Sangkug Lym, Donghyuk Lee, Mike O'Connor, Niladrish Chatterjee, Mattan Erez:
DeLTA: GPU Performance Model for Deep Learning Applications with In-depth Memory System Traffic Analysis. CoRR abs/1904.01691 (2019) - 2018
- [j2]Saugata Ghose, Abdullah Giray Yaglikçi, Raghav Gupta, Donghyuk Lee, Kais Kudrolli, William X. Liu, Hasan Hassan, Kevin K. Chang, Niladrish Chatterjee, Aditya Agrawal, Mike O'Connor
, Onur Mutlu:
What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study. Proc. ACM Meas. Anal. Comput. Syst. 2(3): 38:1-38:41 (2018) - [c18]Donghyuk Lee, Mike O'Connor
, Niladrish Chatterjee:
Reducing Data Transfer Energy by Exploiting Similarity within a Data Transaction. HPCA 2018: 40-51 - [c17]Minsoo Rhu, Mike O'Connor
, Niladrish Chatterjee, Jeff Pool, Youngeun Kwon, Stephen W. Keckler:
Compressing DMA Engine: Leveraging Activation Sparsity for Training Deep Neural Networks. HPCA 2018: 78-91 - [c16]Saugata Ghose, Abdullah Giray Yaglikçi, Raghav Gupta, Donghyuk Lee, Kais Kudrolli, William X. Liu, Hasan Hassan, Kevin K. Chang, Niladrish Chatterjee, Aditya Agrawal, Mike O'Connor
, Onur Mutlu:
What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study. SIGMETRICS (Abstracts) 2018: 110 - [i4]Kevin K. Chang, Abdullah Giray Yaglikçi, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor, Hasan Hassan, Onur Mutlu:
Voltron: Understanding and Exploiting the Voltage-Latency-Reliability Trade-Offs in Modern DRAM Chips to Improve Energy Efficiency. CoRR abs/1805.03175 (2018) - [i3]Saugata Ghose, Abdullah Giray Yaglikçi, Raghav Gupta, Donghyuk Lee, Kais Kudrolli, William X. Liu, Hasan Hassan, Kevin K. Chang, Niladrish Chatterjee, Aditya Agrawal, Mike O'Connor, Onur Mutlu:
What Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study. CoRR abs/1807.05102 (2018) - 2017
- [j1]Kevin K. Chang, Abdullah Giray Yaglikçi, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor, Hasan Hassan, Onur Mutlu:
Understanding Reduced-Voltage Operation in Modern DRAM Devices: Experimental Characterization, Analysis, and Mechanisms. Proc. ACM Meas. Anal. Comput. Syst. 1(1): 10:1-10:42 (2017) - [c15]Niladrish Chatterjee, Mike O'Connor
, Donghyuk Lee, Daniel R. Johnson, Stephen W. Keckler, Minsoo Rhu, William J. Dally:
Architecting an Energy-Efficient DRAM System for GPUs. HPCA 2017: 73-84 - [c14]Mike O'Connor
, Niladrish Chatterjee, Donghyuk Lee, John M. Wilson, Aditya Agrawal, Stephen W. Keckler, William J. Dally:
Fine-grained DRAM: energy-efficient DRAM for extreme bandwidth systems. MICRO 2017: 41-54 - [c13]Gwangsun Kim
, Niladrish Chatterjee, Mike O'Connor
, Kevin Hsieh
:
Toward standardized near-data processing with unrestricted data placement for GPUs. SC 2017: 24 - [c12]Kevin K. Chang, Abdullah Giray Yaglikçi, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor
, Hasan Hassan, Onur Mutlu:
Understanding Reduced-Voltage Operation in Modern DRAM Devices: Experimental Characterization, Analysis, and Mechanisms. SIGMETRICS (Abstracts) 2017: 52 - [i2]Minsoo Rhu, Mike O'Connor, Niladrish Chatterjee, Jeff Pool, Stephen W. Keckler:
Compressing DMA Engine: Leveraging Activation Sparsity for Training Deep Neural Networks. CoRR abs/1705.01626 (2017) - [i1]Kevin K. Chang, Abdullah Giray Yaglikçi, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor, Hasan Hassan, Onur Mutlu:
Understanding Reduced-Voltage Operation in Modern DRAM Chips: Characterization, Analysis, and Mechanisms. CoRR abs/1705.10292 (2017) - 2016
- [c11]Kevin Hsieh
, Eiman Ebrahimi, Gwangsun Kim
, Niladrish Chatterjee, Mike O'Connor
, Nandita Vijaykumar, Onur Mutlu, Stephen W. Keckler:
Transparent Offloading and Mapping (TOM): Enabling Programmer-Transparent Near-Data Processing in GPU Systems. ISCA 2016: 204-216 - [c10]Manjunath Shevgoor, Rajeev Balasubramonian, Niladrish Chatterjee, Jung-Sik Kim:
Addressing service interruptions in memory with thread-to-rank assignment. ISPASS 2016: 24-35 - [c9]Aditya Agrawal, Mike O'Connor
, Evgeny Bolotin, Niladrish Chatterjee, Joel S. Emer, Stephen W. Keckler:
CLARA: Circular Linked-List Auto and Self Refresh Architecture. MEMSYS 2016: 338-349 - 2015
- [c8]Adwait Jog, Onur Kayiran, Tuba Kesten, Ashutosh Pattnaik, Evgeny Bolotin, Niladrish Chatterjee, Stephen W. Keckler, Mahmut T. Kandemir, Chita R. Das:
Anatomy of GPU Memory System for Multi-Application Execution. MEMSYS 2015: 223-234 - 2014
- [c7]Niladrish Chatterjee, Mike O'Connor
, Gabriel H. Loh, Nuwan Jayasena, Rajeev Balasubramonian:
Managing DRAM Latency Divergence in Irregular GPGPU Applications. SC 2014: 128-139 - [c6]Erik Brunvand, Niladrish Chatterjee, Daniel M. Kopta:
Why graphics programmers need to know about DRAM. SIGGRAPH Courses 2014: 21:1-21:75 - 2013
- [b1]Niladrish Chatterjee:
Designing Efficient Memory Schedulers for Future Systems. University of Utah, USA, 2013 - [c5]Manjunath Shevgoor, Jung-Sik Kim, Niladrish Chatterjee, Rajeev Balasubramonian, Al Davis, Aniruddha N. Udipi:
Quantifying the relationship between the power delivery network and architectural policies in a 3D-stacked memory device. MICRO 2013: 198-209 - 2012
- [c4]Niladrish Chatterjee, Naveen Muralimanohar, Rajeev Balasubramonian, Al Davis, Norman P. Jouppi:
Staged Reads: Mitigating the impact of DRAM writes on DRAM reads. HPCA 2012: 41-52 - [c3]Niladrish Chatterjee, Manjunath Shevgoor, Rajeev Balasubramonian, Al Davis, Zhen Fang, Ramesh Illikkal, Ravi R. Iyer:
Leveraging Heterogeneity in DRAM Main Memories to Accelerate Critical Word Access. MICRO 2012: 13-24 - 2010
- [c2]Kshitij Sudan, Niladrish Chatterjee, David W. Nellans, Manu Awasthi, Rajeev Balasubramonian, Al Davis:
Micro-pages: increasing DRAM efficiency with locality-aware data placement. ASPLOS 2010: 219-230 - [c1]Aniruddha N. Udipi, Naveen Muralimanohar, Niladrish Chatterjee, Rajeev Balasubramonian, Al Davis, Norman P. Jouppi:
Rethinking DRAM design and organization for energy-constrained multi-cores. ISCA 2010: 175-186
Coauthor Index
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last updated on 2024-08-05 21:17 CEST by the dblp team
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