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ORCIDWei Mao 0002
Person information
- affiliation: HiSilicon Technologies Co., Ltd., Shenzhen, China
- affiliation (PhD 2017): National University of Singapore (NUS), Singapore
- affiliation: Southeast University, Department of electronic science and technology, Nanjing, China
Other persons with the same name
- Wei Mao — disambiguation page
- Wei Mao 0001
![[0000-0002-8876-8983]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0002-8876-8983")
— Australian National University, Research School of Engineering, Canberra, ACT, Australia - Wei Mao 0003 — Intel Corporation, Santa Clara, CA, USA (and 2 more)
- Wei Mao 0004 — Tongji University, Institute for Anthropomatics and Robotics, Karlsruhe Institute of Technology, Karlsruhe, Germany Sino-German School, Shanghai, China
- Wei Mao 0005 — Jiangsu Second Normal University, School of Mathematical Science, Nanjing, China
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2020 – today
- 2024
[j14]Boyu Li, Kai Li, Jiajun Zhou, Yuan Ren, Wei Mao, Hao Yu, Ngai Wong:
A Reconfigurable Processing Element for Multiple-Precision Floating/Fixed-Point HPC. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1401-1405 (2024)- 2023
- [j13]Xiaojin Zhao, Hailong Jiao, Wei Mao:
APCCAS 2022 Guest Editorial Special Issue Based on the 18th Asia Pacific Conference on Circuits and Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 70(11): 4221-4222 (2023) - [j12]Quan Cheng, Liuyao Dai, Mingqiang Huang, Ao Shen, Wei Mao, Masanori Hashimoto, Hao Yu:
A Low-Power Sparse Convolutional Neural Network Accelerator With Pre-Encoding Radix-4 Booth Multiplier. IEEE Trans. Circuits Syst. II Express Briefs 70(6): 2246-2250 (2023) - [c16]Haoxiang Zhou, Haiqiao Hong, Dingbang Liu, Hang Liu, Yu Xia, Kai Li, Jun Liu, Shaobo Luo, Wei Mao, Hao Yu:
RISC-V based Fully-Parallel SRAM Computing-in-Memory Accelerator with High Hardware Utilization and Data Reuse Rate. AICAS 2023: 1-5 - 2022
- [j11]Haoran Lyu, Fengwei An, Shirui Zhao, Wei Mao, Hao Yu:
A 703.4-GOPs/W Binary SegNet Processor With Computing-Near-Memory Architecture for Road Detection. IEEE Des. Test 39(2): 74-83 (2022) - [j10]Dingbang Liu, Haoxiang Zhou, Wei Mao, Jun Liu, Yuliang Han, Changhai Man, Qiuping Wu, Zhiru Guo, Mingqiang Huang, Shaobo Luo, Mingsong Lv, Quan Chen, Hao Yu:
An Energy-Efficient Mixed-Bit CNN Accelerator With Column Parallel Readout for ReRAM-Based In-Memory Computing. IEEE J. Emerg. Sel. Topics Circuits Syst. 12(4): 821-834 (2022) - [j9]Yufei Chen, Tingtao Li, Qinming Zhang, Wei Mao, Nan Guan, Mei Tian, Hao Yu, Cheng Zhuo:
ANT-UNet: Accurate and Noise-Tolerant Segmentation for Pathology Image Processing. ACM J. Emerg. Technol. Comput. Syst. 18(2): 27:1-27:17 (2022) - [j8]Mingqiang Huang, Yucen Liu, Changhai Man, Kai Li, Quan Cheng, Wei Mao, Hao Yu:
A High Performance Multi-Bit-Width Booth Vector Systolic Accelerator for NAS Optimized Deep Learning Neural Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 69(9): 3619-3631 (2022) - [j7]Kai Li, Wei Mao, Junzhuo Zhou, Boyu Li, Zhengke Yang, Shuxing Yang, Laimin Du, Sixiao Huang, Hao Yu:
A Vector Systolic Accelerator for Multi-Precision Floating-Point High-Performance Computing. IEEE Trans. Circuits Syst. II Express Briefs 69(10): 4123-4127 (2022) - [j6]Shuwei Li, Changhai Man, Ao Shen, Ziyi Guan, Wei Mao, Shaobo Luo, Rumin Zhang, Hao Yu:
A Fall Detection Network by 2D/3D Spatio-temporal Joint Models with Tensor Compression on Edge. ACM Trans. Embed. Comput. Syst. 21(6): 83:1-83:19 (2022) - [j5]Wei Mao, Kai Li, Quan Cheng, Liuyao Dai, Boyu Li, Xinang Xie, He Li, Longyang Lin, Hao Yu:
A Configurable Floating-Point Multiple-Precision Processing Element for HPC and AI Converged Computing. IEEE Trans. Very Large Scale Integr. Syst. 30(2): 213-226 (2022) - [j4]Wei Mao, Liuyao Dai, Kai Li, Quan Cheng, Yuhang Wang, Laimin Du, Shaobo Luo, Mingqiang Huang, Hao Yu:
An Energy-Efficient Mixed-Bitwidth Systolic Accelerator for NAS-Optimized Deep Neural Networks. IEEE Trans. Very Large Scale Integr. Syst. 30(12): 1878-1890 (2022) - [c15]Kai Li, Junzhuo Zhou, Boyu Li, Shuxing Yang, Sixiao Huang, Shaobo Luo, Wei Mao, Hao Yu:
A Vector Systolic Accelerator for Multi-Precision Floating-Point High-Performance Computing. AICAS 2022: 226-229 - [c14]Dingbang Liu, Wei Mao, Haoxiang Zhou, Jun Liu, Qiuping Wu, Haiqiao Hong, Hao Yu:
An Energy-Efficient Mixed-Bit ReRAM-based Computing-in-Memory CNN Accelerator with Fully Parallel Readout. APCCAS 2022: 1-5 - [c13]Shaobo Luo, Zhiyuan Xie, Gengxin Chen, Lei Cui, Mei Yan, Xiwei Huang, Shuwei Li, Changhai Man, Wei Mao, Hao Yu:
Hierarchical DNN with Heterogeneous Computing Enabled High-Performance DNA Sequencing. APCCAS 2022: 35-40 - [c12]Laimin Du, Leibin Ni, Xiong Liu, Wei Mao, Hao Yu:
A Low-Power Approximate Multiplier with Sign-Focus Compressor and Error Compensation. APCCAS 2022: 226-230 - [c11]Liuyao Dai, Quan Cheng, Yuhang Wang, Gengbin Huang, Junzhuo Zhou, Kai Li, Wei Mao, Hao Yu:
An Energy-Efficient Bit-Split-and-Combination Systolic Accelerator for NAS-Based Multi-Precision Convolution Neural Networks. ASP-DAC 2022: 448-453 - [c10]Kai Li, Junzhuo Zhou, Yuhang Wang, Junyi Luo, Zhengke Yang, Shuxin Yang, Wei Mao, Mingqiang Huang, Hao Yu:
A Precision-Scalable Energy-Efficient Bit-Split-and-Combination Vector Systolic Accelerator for NAS-Optimized DNNs on Edge. DATE 2022: 730-735 - [c9]Shuwei Li, Zhiru Guo, Ao Shen, Zheqi Yu, Wei Mao, Shaobo Luo, Hao Yu:
BaseFormer: Transformer based Base-Caller for Fast and Accurate Next Generation Sequencing. EMBC 2022: 463-466 - 2021
- [c8]Kai Li, Wei Mao, Xinang Xie, Quan Cheng, Huan Xie, Zhenjiang Dong, Hao Yu:
Multiple-Precision Floating-Point Dot Product Unit for Efficient Convolution Computation. AICAS 2021: 1-4 - [c7]Ziyi Guan, Shuwei Li, Yuan Cheng, Changhai Man, Wei Mao, Ngai Wong, Hao Yu:
A Video-based Fall Detection Network by Spatio-temporal Joint-point Model on Edge Devices. DATE 2021: 422-427 - [c6]Wei Mao, Kai Li, Xinang Xie, Shirui Zhao, He Li, Hao Yu:
A Reconfigurable Multiple-Precision Floating-Point Dot Product Unit for High-Performance Computing. DATE 2021: 1793-1798 - 2020
- [c5]Wei Mao, Zhihua Xiao, Peng Xu, Hongwei Ren, Dingbang Liu, Shirui Zhao, Fengwei An, Hao Yu:
Energy-Efficient Machine Learning Accelerator for Binary Neural Networks. ACM Great Lakes Symposium on VLSI 2020: 77-82
2010 – 2019
- 2019
- [j3]Yuxuan Luo, Kok-Hin Teng, Yongfu Li, Wei Mao, Yong Lian, Chun-Huat Heng:
A 74-μW 11-Mb/s Wireless Vital Signs Monitoring SoC for Three-Lead ECG, Respiration Rate, and Body Temperature. IEEE Trans. Biomed. Circuits Syst. 13(5): 907-917 (2019) - [j2]Wei Mao, Yongfu Li, Chun-Huat Heng, Yong Lian:
A Low Power 12-bit 1-kS/s SAR ADC for Biomedical Signal Processing. IEEE Trans. Circuits Syst. I Regul. Pap. 66-I(2): 477-488 (2019) - 2018
- [j1]Wei Mao, Yongfu Li, Chun-Huat Heng, Yong Lian:
High Dynamic Performance Current-Steering DAC Design With Nested-Segment Structure. IEEE Trans. Very Large Scale Integr. Syst. 26(5): 995-999 (2018) - 2017
- [c4]Yuxuan Luo, Kok-Hin Teng, Yongfu Li, Wei Mao, Chun-Huat Heng, Yong Lian:
A 93μW 11Mbps wireless vital signs monitoring SoC with 3-lead ECG, bio-impedance, and body temperature. A-SSCC 2017: 29-32 - [c3]Wei Mao, Yongfu Li, Chun-Huat Heng, Yong Lian:
Zero-bias true random number generator using LFSR-based scrambler. ISCAS 2017: 1-4 - 2016
- [c2]Wei Mao, Yongfu Li, Chun-Huat Heng, Yong Lian:
Dynamic mapping method for static and dynamic performance improvement on current-steering digital-to-analog converter. APCCAS 2016: 336-339 - 2014
- [c1]Yongfu Li, Wei Mao, Zhe Zhang, Yong Lian:
An ultra-low voltage comparator with improved comparison time and reduced offset voltage. APCCAS 2014: 407-410
Coauthor Index
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last updated on 2024-04-21 16:51 CEST by the dblp team
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