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Journal Articles
- 2022
[j4]Jaeyoung Kim, Kyungrok Kim, Hyunchang Kim, Pyoungwon Park, Seonghyun Lee, Taikmin Lee, Dongwoo Kang:
Experimental Validation of High Precision Web Handling for a Two-Actuator-Based Roll-to-Roll System. Sensors 22(8): 2917 (2022)- 2016
- [j3]Pyoungwon Park, Dipankar Nag, Dan Lei Yan, Muthukumaraswamy Annamalai Arasu:
Digital Compensation Method for the Path Delay Mismatches in GRO-TDC. J. Circuits Syst. Comput. 25(1): 1640008:1-1640008:12 (2016) - 2015
- [j2]Pyoungwon Park, David Ruffieux, Kofi A. A. Makinwa:
A Thermistor-Based Temperature Sensor for a Real-Time Clock With ± 2 ppm Frequency Stability. IEEE J. Solid State Circuits 50(7): 1571-1580 (2015) - 2012
- [j1]Pyoungwon Park, Dongmin Park, SeongHwan Cho:
A 2.4 GHz Fractional-N Frequency Synthesizer With High-OSR ΔΣ Modulator and Nested PLL. IEEE J. Solid State Circuits 47(10): 2433-2443 (2012)
Conference and Workshop Papers
- 2015
- [c5]Junghyup Lee, Pyoungwon Park, SeongHwan Cho, Minkyu Je:
5.10 A 4.7MHz 53μW fully differential CMOS reference clock oscillator with -22dB worst-case PSNR for miniaturized SoCs. ISSCC 2015: 1-3 - 2014
- [c4]Pyoungwon Park, Kofi A. A. Makinwa, David Ruffieux:
A resistor-based temperature sensor for a real time clock with ±2ppm frequency stability. ESSCIRC 2014: 391-394 - [c3]Pyoungwon Park, Dipankar Nag, Dan Lei Yan, Muthukumaraswamy Annamalai Arasu:
Digital compensation method for the path delay mismatches in GRO-TDC. ISIC 2014: 75-78 - 2012
- [c2]Pyoungwon Park, Jaejin Park, Hojin Park, SeongHwan Cho:
An all-digital clock generator using a fractionally injection-locked oscillator in 65nm CMOS. ISSCC 2012: 336-337 - 2011
- [c1]Pyoungwon Park, Dongmin Park, SeongHwan Cho:
A fractional-N frequency synthesizer using high-OSR delta-sigma modulator and nested-PLL. CICC 2011: 1-4
Coauthor Index
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