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Books and Theses
- 2011
[b1]Ji Gu:
Application-specific design of low power instruction cache hierarchy for embedded processors. University of New South Wales, Sydney, Australia, 2011
Journal Articles
- 2024
- [j8]Ji Gu
, Yushi Liu, Xiaolong Xu:
SharpEdge: A QoS-driven task scheduling scheme with blockchain in mobile edge computing. Concurr. Comput. Pract. Exp. 36(19) (2024) - [j7]Ji Gu, Chongjun Ouyang, Xin Zhang, Hongwen Yang:
RIS-Assisted Multi-Carrier Secret Key Generation in Static Environments. IEEE Wirel. Commun. Lett. 13(10): 2777-2781 (2024) - 2023
- [j6]Xiaolong Xu, Ji Gu, Hanzhi Yan, Wentao Liu, Lianyong Qi, Xiaokang Zhou:
Reputation-Aware Supplier Assessment for Blockchain-Enabled Supply Chain in Industry 4.0. IEEE Trans. Ind. Informatics 19(4): 5485-5494 (2023) - 2013
- [j5]Ji Gu, Hui Guo, Tohru Ishihara:
DLIC: Decoded loop instructions caching for energy-aware embedded processors. ACM Trans. Embed. Comput. Syst. 13(1): 6:1-6:26 (2013) - 2011
- [j4]Ji Gu, Hui Guo:
Reducing Power and Energy Overhead in Instruction Prefetching for Embedded Processor Systems. Int. J. Handheld Comput. Res. 2(4): 42-58 (2011) - [j3]Ji Gu, Hui Guo, Patrick Li:
An on-chip instruction cache design with one-bit tag for low-power embedded systems. Microprocess. Microsystems 35(4): 382-391 (2011) - 2009
- [j2]Ji Gu, Hui Guo:
An Efficient Segmental Bus-Invert Coding Method for Instruction Memory Data Bus Switching Reduction. EURASIP J. Embed. Syst. 2009 (2009) - 2008
- [j1]Weibing Deng, Ji Gu, Jianmin Huang:
Upscaling methods for a class of convection-diffusion equations with highly oscillating coefficients. J. Comput. Phys. 227(16): 7621-7642 (2008)
Conference and Workshop Papers
- 2012
- [c6]Ji Gu, Tohru Ishihara, Kyungsoo Lee:
Loop instruction caching for energy-efficient embedded multitasking processors. ESTIMedia 2012: 97-106 - [c5]Ji Gu, Tohru Ishihara:
A Case Study of Energy-efficient Loop Instruction Cache Design for Embedded Multitasking Systems. SMARTGREENS 2012: 197-202 - 2010
- [c4]Ji Gu, Hui Guo:
Enabling large decoded instruction loop caching for energy-aware embedded processors. CASES 2010: 247-256 - [c3]Ji Gu, Hui Guo:
An Energy Efficient Instruction Prefetching Scheme for Embedded Processors. UCMA 2010: 73-88 - 2009
- [c2]Ji Gu, Hui Guo:
A Segmental Bus-invert Coding Method for Instruction Memory Data Bus Power Efficiency. ISCAS 2009: 137-140 - [c1]Ji Gu, Hui Guo, Patrick Li:
ROBTIC: An On-chip Instruction Cache Design for Low Power Embedded Systems. RTCSA 2009: 419-424
Data and Artifacts
- 2023
- [d1]Tianqi Xiang, Ji Gu, Yicheng Wang, Yuehong Gao, Xin Zhang:
Computer vision aided beamforming for indoor scenario at sub-6GHz. IEEE DataPort, 2023
Coauthor Index
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