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ORCIDJeong-Soo Park 0004
Person information
- affiliation: Samsung Electronics
- affiliation (PhD 2014): Yonsei University, Department of Computer Science, Korea
Other persons with the same name
- Jeong-Soo Park (aka: Jeongsoo Park) — disambiguation page
- Jeongsoo Park 0001 (aka: Jeong-Soo Park 0001) — Seoul National University, Music and Audio Research Group, Seoul, South Korea
- Jeong-Soo Park 0002 (aka: Jeongsoo Park 0002) — Hoseo University, Asan, South Korea
- Jeong-Soo Park 0003
![[0000-0002-8460-4869]](https://dblp.uni-trier.de/img/orcid-mark.12x12.png "0000-0002-8460-4869")
(aka: Jeongsoo Park 0003) — Chonnam National University, Department of Statistics, Gwangju, South Korea - Jeong-Soo Park 0005 (aka: Jeongsoo Park 0005) — SK hynix Inc., Memory Research and Development Division, Icheon, South Korea
- Jeongsoo Park 0006 (aka: Jeong-Soo Park 0006) — ETH Zurich, Switzerland (and 2 more)
- Jeongsoo Park 0007 — Sungkyunkwan University, Department of Electronic and Electrical Engineering, Suwon, South Korea
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2010 – 2019
- 2015
[j5]Jae-Ho Nah, Jin-Woo Kim, Junho Park, Won-Jong Lee, Jeong-Soo Park, Seokyoon Jung, Woo-Chan Park, Dinesh Manocha, Tack-Don Han:
HART: A Hybrid Architecture for Ray Tracing Animated Scenes. IEEE Trans. Vis. Comput. Graph. 21(3): 389-401 (2015)- 2013
- [j4]Jeong-Soo Park, Woo-Chan Park, Jae-Ho Nah, Tack-Don Han:
Node pre-fetching architecture for real-time ray tracing. IEICE Electron. Express 10(14): 20130468 (2013) - [c2]Kwontaek Kwon, Sungjin Son, Jeong-Soo Park, Jeongae Park, Sangoak Woo, Seokyoon Jung, Soojung Ryu:
Mobile GPU shader processor based on non-blocking Coarse Grained Reconfigurable Arrays architecture. FPT 2013: 198-205 - 2011
- [j3]Woo-Chan Park, Jin-Hong Park, Woo-Nam Chung, Jeong-Soo Park, Sangduk Kim, Hong-Sik Kim, Young-Sik Kim, Tack-Don Han:
An effective depth data memory system using an escape count buffer for 3D rendering processors. IEICE Electron. Express 8(4): 209-214 (2011) - [j2]Woo-Chan Park, Dong-Seok Kim, Jeong-Soo Park, Sangduk Kim, Hong-Sik Kim, Tack-Don Han:
The design of a texture mapping unit with effective MIP-map level selection for real-time ray tracing. IEICE Electron. Express 8(13): 1064-1070 (2011) - [j1]Jae-Ho Nah, Jeong-Soo Park, Chanmin Park, Jin-Woo Kim, Yun-Hye Jung, Woo-Chan Park, Tack-Don Han:
T&I engine: traversal and intersection engine for hardware accelerated ray tracing. ACM Trans. Graph. 30(6): 160 (2011) - 2010
- [c1]Jae-Ho Nah, Jeong-Soo Park, Jin-Woo Kim, Chanmin Park, Tack-Don Han:
Ordered depth-first layouts for ray tracing. SIGGRAPH ASIA (Sketches) 2010: 55:1-55:2
Coauthor Index
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last updated on 2024-08-07 22:31 CEST by the dblp team
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