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ORCIDSeung-Tak Ryu
- > Home > Persons > Seung-Tak Ryu
Publications
- 2020
[j41]Dong-Shin Jo
, Ba-Ro-Saim Sung, Min-Jae Seo, Woo-Cheol Kim, Seung-Tak Ryu:
A 40-nm CMOS 7-b 32-GS/s SAR ADC With Background Channel Mismatch Calibration. IEEE Trans. Circuits Syst. II Express Briefs 67-II(4): 610-614 (2020)- 2019
- [j39]Dong-Ryeol Oh, Jong-In Kim, Dong-Shin Jo, Woo-Chul Kim, Dong-Jin Chang, Seung-Tak Ryu:
A 65-nm CMOS 6-bit 2.5-GS/s 7.5-mW 8 $\times$ Time-Domain Interpolating Flash ADC With Sequential Slope-Matching Offset Calibration. IEEE J. Solid State Circuits 54(1): 288-297 (2019) - [j37]Kyoung-Jun Moon, Dong-Shin Jo, Wan Kim, Michael Choi, Hyungjong Ko, Seung-Tak Ryu:
A 9.1-ENOB 6-mW 10-Bit 500-MS/s Pipelined-SAR ADC With Current-Mode Residue Processing in 28-nm CMOS. IEEE J. Solid State Circuits 54(9): 2532-2542 (2019) - [c25]Woo-Cheol Kim, Dong-Shin Jo, Yi-Ju Roh, Ye-Dam Kim, Seung-Tak Ryu:
A 6b 28GS/s Four-channel Time-interleaved Current-Steering DAC with Background Clock Phase Calibration. VLSI Circuits 2019: 138- - 2016
- [j26]Wan Kim, Hyeok-Ki Hong, Yi-Ju Roh, Hyun-Wook Kang, Sun-Il Hwang, Dong-Shin Jo, Dong-Jin Chang, Min-Jae Seo, Seung-Tak Ryu:
A 0.6 V 12 b 10 MS/s Low-Noise Asynchronous SAR-Assisted Time-Interleaved SAR (SATI-SAR) ADC. IEEE J. Solid State Circuits 51(8): 1826-1839 (2016) - 2015
- [j20]Jong-In Kim, Dong-Ryeol Oh, Dong-Shin Jo, Ba-Ro-Saim Sung, Seung-Tak Ryu:
A 65 nm CMOS 7b 2 GS/s 20.7 mW Flash ADC With Cascaded Latch Interpolation. IEEE J. Solid State Circuits 50(10): 2319-2330 (2015) - [c17]Hyeok-Ki Hong, Hyun-Wook Kang, Dong-Shin Jo, Dong-Suk Lee, Yong-Sang You, Yong-Hee Lee, Ho-Jin Park, Seung-Tak Ryu:
26.7 A 2.6b/cycle-architecture-based 10b 1 JGS/s 15.4mW 4×-time-interleaved SAR ADC with a multistep hardware-retirement technique. ISSCC 2015: 1-3 - [c16]Ba-Ro-Saim Sung, Dong-Shin Jo, Il-Hoon Jang, Dong-Suk Lee, Yong-Sang You, Yong-Hee Lee, Ho-Jin Park, Seung-Tak Ryu:
26.4 A 21fJ/conv-step 9 ENOB 1.6GS/S 2× time-interleaved FATI SAR ADC with background offset and timing-skew calibration in 45nm CMOS. ISSCC 2015: 1-3
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