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2020 – today
- 2023
[c6]Yoichiro Ueno, Akihiko Tsukahara, Noriharu Miyaho:
Next Generation Connectionless IP router architecture with Switching Delay for URLLC Services. HPSR 2023: 1-6
2010 – 2019
- 2017
- [c5]Hiroyuki Kimiyama, Naoki Yonezaki, Tomoaki Tsutsumi, Kaori Sano, Hirofumi Yamaki, Yoichiro Ueno, Ryôichi Sasaki, Hiroshi Kobayashi:
Autonomous and distributed internet security (AIS) infrastructure for safe internet. NOF 2017: 106-113
2000 – 2009
- 2009
- [c4]Yoichiro Ueno, Noriharu Miyaho, Shuichi Suzuki:
Disaster recovery mechanism using widely distributed networking and secure metadata handling technology. UPGRADE-CN 2009: 45-48 - 2001
- [c3]Motokazu Ozawa, Masashi Imai, Hiroshi Nakamura
, Takashi Nanya, Yoichiro Ueno:
Performance Evaluation of Cascade ALU Architecture for Asynchronous Super-Scalar Processors. ASYNC 2001: 162-172
1990 – 1999
- 1998
- [c2]Akihiro Takamura, Motokazu Ozawa, Izumi Fukasaku, Taro Fujii, Yoichiro Ueno, Masashi Imai, Masashi Kuwako, Takashi Nanya:
TITAC-2: An Asynchronous 32-bit Microprocessor. ASP-DAC 1998: 319-320 - 1997
- [c1]Akihiro Takamura, Masashi Kuwako, Masashi Imai, Taro Fujii, Motokazu Ozawa, Izumi Fukasaku, Yoichiro Ueno, Takashi Nanya:
TITAC-2: An asynchronous 32-bit microprocessor based on Scalable-Delay-Insensitive model. ICCD 1997: 288-294 - 1994
- [j1]Takashi Nanya, Yoichiro Ueno, Hiroto Kagotani, Masashi Kuwako, Akihiro Takamura:
TITAC: Design of A Quasi-Delay-Insensitive Microprocessor. IEEE Des. Test Comput. 11(2): 50-63 (1994)
Coauthor Index
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