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Books and Theses
- 1993
[b1]Yung-Chin Chen:
Cache Design and Performance in a Large-Scale Shared-Memory Multiprocessor System. University of Illinois Urbana-Champaign, USA, 1993
Conference and Workshop Papers
- 2024
- [c5]Yung-Chin Chen
, Shimpei Ando, Daichi Fujiki, Shinya Takamaeda-Yamazaki, Kentaro Yoshioka:
OSA-HCIM: On-The-Fly Saliency-Aware Hybrid SRAM CIM with Dynamic Precision Configuration. ASPDAC 2024: 539-544 - 1993
- [c4]Yung-Chin Chen, Alexander V. Veidenbaum:
Performance Evaluation of Memory Caches in Multiprocessors. ICPP (1) 1993: 184-187 - 1992
- [c3]Yung-Chin Chen, Alexander V. Veidenbaum:
An Effective Write Policy for Software Coherence Schemes. SC 1992: 661-672 - 1991
- [c2]Yung-Chin Chen, Alexander V. Veidenbaum:
A software coherence scheme with the assistance of directories. ICS 1991: 284-294 - [c1]Yung-Chin Chen, Alexander V. Veidenbaum:
Comparison and analysis of software and directory coherence schemes. SC 1991: 818-829
Informal and Other Publications
- 2024
- [i3]Wenlun Zhang, Shimpei Ando, Yung-Chin Chen, Satomi Miyagi, Shinya Takamaeda-Yamazaki, Kentaro Yoshioka:
PACiM: A Sparsity-Centric Hybrid Compute-in-Memory Architecture via Probabilistic Approximation. CoRR abs/2408.16246 (2024) - 2023
- [i2]Yung-Chin Chen, Shimpei Ando, Daichi Fujiki, Shinya Takamaeda-Yamazaki, Kentaro Yoshioka:
OSA-HCIM: On-The-Fly Saliency-Aware Hybrid SRAM CIM with Dynamic Precision Configuration. CoRR abs/2308.15040 (2023) - [i1]Yung-Chin Chen, Shimpei Ando, Daichi Fujiki, Shinya Takamaeda-Yamazaki, Kentaro Yoshioka:
HALO-CAT: A Hidden Network Processor with Activation-Localized CIM Architecture and Layer-Penetrative Tiling. CoRR abs/2312.06086 (2023)
Coauthor Index
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