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Raja Swaminathan
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2020 – today
- 2024
- [c6]Alan Smith, Gabriel H. Loh, Michael J. Schulte, Mike Ignatowski, Samuel Naffziger, Mike Mantor, Nathan Kalyanasundharam, Vamsi Alla, Nicholas Malaya, Joseph L. Greathouse, Eric Chapman, Raja Swaminathan:
Realizing the AMD Exascale Heterogeneous Processor Vision : Industry Product. ISCA 2024: 876-889 - [c5]Alan Smith, Eric Chapman, Chintan Patel, Raja Swaminathan, John J. Wuu, Tyrone Huang, Wonjun Jung, Alexander Kaganov, Hugh McIntyre, Ramon Mangaser:
11.1 AMD InstinctTM MI300 Series Modular Chiplet Package - HPC and AI Accelerator for Exa-Class Systems. ISSCC 2024: 490-492 - [c4]Alan Smith, Gabriel H. Loh, John J. Wuu, Samuel Naffziger, Tyrone Huang, Hugh McIntyre, Ramon Mangaser, Wonjun Jung, Raja Swaminathan:
AMD Instinct™ MI300X Accelerator: Packaging and Architecture Co-Optimization. VLSI Technology and Circuits 2024: 1-2 - 2023
- [c3]Gabriel H. Loh, Raja Swaminathan:
The Next Era for Chiplet Innovation. DATE 2023: 1-6 - [c2]Raja Swaminathan, Michael J. Schulte, Brett Wilkerson, Gabriel H. Loh, Alan Smith, Norman James:
AMD InstinctTM MI250X Accelerator enabled by Elevated Fanout Bridge Advanced Packaging Architecture. VLSI Technology and Circuits 2023: 1-2 - 2022
- [c1]John J. Wuu, Rahul Agarwal, Michael Ciraula, Carl Dietz, Brett Johnson, Dave Johnson, Russell Schreiber, Raja Swaminathan, Will Walker, Samuel Naffziger:
3D V-Cache: the Implementation of a Hybrid-Bonded 64MB Stacked Cache for a 7nm x86-64 CPU. ISSCC 2022: 428-429
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last updated on 2024-10-21 21:30 CEST by the dblp team
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