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2020 – today
- 2021
[j8]Yuito Sawayama, Takayuki Morishita, Kiyotaka Komoku, Nobuyuki Itoh:
Study of dual-band concurrent LNA equipping mutual inductive notch filter matching circuit. IEICE Electron. Express 18(5): 20210046 (2021)
2010 – 2019
- 2018
- [j7]Yuka Itano, Taishi Kitano, Yuta Sakamoto, Kiyotaka Komoku, Takayuki Morishita, Nobuyuki Itoh:
Modeling and Layout Optimization of MOM Capacitor for High-Frequency Applications. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 101-A(2): 441-446 (2018) - 2016
- [j6]Nobuyuki Itoh, Hiroki Tsuji, Yuka Itano, Takayuki Morishita, Kiyotaka Komoku, Sadayuki Yoshitomi:
A Study of Striped Inductor for K- and Ka-Band Voltage-Controlled Oscillators. IEICE Trans. Electron. 99-C(6): 614-622 (2016) - [c5]Takuma Ogawa, Takayuki Morishita, Kiyotaka Komoku, Yuka Itano, Sadayuki Yoshitomi, Nobuyuki Itoh:
A study of current-reuse 800 MHz/1.9 GHz concurrent dual-band amplifier. RWS 2016: 245-247
2000 – 2009
- 2009
- [j5]Toshihiro Matsuda, Shinsuke Ishimaru, Shingo Nohara, Hideyuki Iwata, Kiyotaka Komoku, Takayuki Morishita, Takashi Ohzone:
Current-Voltage Hysteresis Characteristics in MOS Capacitors with Si-Implanted Oxide. IEICE Trans. Electron. 92-C(12): 1523-1530 (2009) - 2008
- [j4]Toshihiro Matsuda, Yuya Sugiyama, Keita Nohara, Kazuhiro Morita, Hideyuki Iwata, Takashi Ohzone, Takayuki Morishita, Kiyotaka Komoku:
A Test Structure for Asymmetry and Orientation Dependence Analysis of CMOSFETs. IEICE Trans. Electron. 91-C(8): 1331-1337 (2008) - 2007
- [j3]Takashi Ohzone, Eiji Ishii, Takayuki Morishita, Kiyotaka Komoku, Toshihiro Matsuda, Hideyuki Iwata:
A Test Structure to Analyze Electrical CMOSFET Reliabilities between Center and Edge along the Channel Width. IEICE Trans. Electron. 90-C(2): 515-522 (2007) - [j2]Takashi Ohzone, Tatsuaki Sadamoto, Takayuki Morishita, Kiyotaka Komoku, Toshihiro Matsuda, Hideyuki Iwata:
A CMOS Temperature Sensor Circuit. IEICE Trans. Electron. 90-C(4): 895-902 (2007) - 2006
- [j1]Takashi Ohzone, Kazuhiko Okada, Takayuki Morishita, Kiyotaka Komoku, Toshihiro Matsuda, Hideyuki Iwata:
A Test Structure to Analyze Highly-Doped-Drain and Lightly-Doped-Drain in CMOSFET. IEICE Trans. Electron. 89-C(9): 1351-1357 (2006)
1990 – 1999
- 1999
- [c4]Fumihiro Hatano, Noriko Akita, Kiyotaka Komoku, Takayuki Morishita, Iwao Teramoto:
Implementation of cell array neuro-processor by using FPGA. IJCNN 1999: 2447-2451 - [c3]Noriko Akita, Fumihiro Hatano, Kiyotaka Komoku, Takayuki Morishita, Iwao Teramoto:
Development support software of cell array processor and its neural network application. IJCNN 1999: 2452-2455 - 1996
- [c2]Takayuki Morishita, Iwao Teramoto:
Architecture of Cell Array Neuro-Processor. ICES 1996: 277-288 - 1995
- [c1]Takayuki Morishita, Iwao Teramoto:
Processing cell array neural network multiprocessors. ICNN 1995: 1470-1473
Coauthor Index
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