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2020 – today
- 2024
[j4]Bingyi Ye
, Guangdong Wu, Weixin Gai, Kai Sheng, Yandong He:
A Five-Tap Delay-Line-Based Feed-Forward-Equalizer for 200-Gb/s Wireline Receiver in 28-nm CMOS. IEEE J. Solid State Circuits 59(1): 19-28 (2024)- [c8]Boyang Zhang, Zhifei Wang, Zeze Feng, Tianchen Ye, Bingyi Ye, Zixu Wang, Weixin Gai:
A 200-Gb/s PAM-4 Transmitter with 1.6-Vppd Output Swing and Clock Skew Correction in 12-nm FinFET. VLSI Technology and Circuits 2024: 1-2 - 2023
- [j3]Bingyi Ye, Kai Sheng, Weixin Gai, Haowei Niu, Boyang Zhang, Yandong He, Song Jia, Congcong Chen, Jiaqi Yu:
A 2.29-pJ/b 112-Gb/s Wireline Transceiver With RX Four-Tap FFE for Medium-Reach Applications in 28-nm CMOS. IEEE J. Solid State Circuits 58(1): 19-29 (2023) - [j2]Kai Sheng, Haowei Niu, Boyang Zhang, Weixin Gai, Bingyi Ye, Hang Zhou, Congcong Chen:
A 4.6-pJ/b 200-Gb/s Analog DP-QPSK Coherent Optical Receiver in 28-nm CMOS. IEEE J. Solid State Circuits 58(1): 45-56 (2023) - [c7]Bingyi Ye, Guangdong Wu, Weixin Gai, Kai Sheng, Yandong He:
A 0.43pJ/b 200Gb/s 5-Tap Delay-Line-Based Receiver FFE with Low-Frequency Equalization in 28nm CMOS. ISSCC 2023: 112-113 - [c6]Kai Sheng, Weixin Gai, Zeze Feng, Haowei Niu, Bingyi Ye, Hang Zhou:
A 128Gb/s PAM-4 Transmitter with Programmable-Width Pulse Generator and Pattern-Dependent Pre-Emphasis in 28nm CMOS. ISSCC 2023: 120-121 - 2022
- [c5]Ninghuang Li, Weixin Gai, Bingyi Ye, Haowei Niu, Lei Lu:
A High-Linearity 14GHz 7b Phase Interpolator for Ultra-High-Speed Wireline Applications. ISCAS 2022: 2487-2490 - [c4]Bingyi Ye, Kai Sheng, Weixin Gai, Haowei Niu, Boyang Zhang, Yandong He, Song Jia, Congcong Chen, Jiaqi Yu:
A 2.29pJ/b 112Gb/s Wireline Transceiver with RX 4-Tap FFE for Medium-Reach Applications in 28nm CMOS. ISSCC 2022: 118-120 - [c3]Kai Sheng, Haowei Niu, Boyang Zhang, Weixin Gai, Bingyi Ye, Hang Zhou, Congcong Chen:
A 4.6pJ/b 200Gb/s Analog DP-QPSK Coherent Optical Receiver in 28nm CMOS. ISSCC 2022: 282-284 - 2021
- [j1]Ai He, Weixin Gai, Bingyi Ye, Boyang Zhang, Kai Sheng, Yuanliang Li:
56 Gb/s PAM4 receiver with an overshoot compensation scheme in 28 nm CMOS technology. Microelectron. J. 116: 105236 (2021) - [c2]Liangxiao Tang, Weixin Gai, Chih-Kong Ken Yang, Bingyi Ye, Congcong Chen:
A 25Gb/s 185mW PAM-4 Receiver with 4-Tap Adaptive DFE and Sampling Clock Optimization in 55nm CMOS. ISCAS 2021: 1-4 - [c1]Boyang Zhang, Weixin Gai, Haowei Niu, Bingyi Ye, Kai Sheng, Tianjian Zuo, Lei Liu:
Analog Signal Processing Circuits for a 400Gb/s 16QAM Optical Coherent Receiver. ISCAS 2021: 1-5
Coauthor Index
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