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Samuele Germiniani
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- affiliation: University of Verona, Italy
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2020 – today
- 2024
- [j3]Alberto Bosio
, Samuele Germiniani
, Graziano Pravadelli
, Marcello Traiola
:
Syntactic and Semantic Analysis of Temporal Assertions to Support the Approximation of RTL Designs. J. Electron. Test. 40(2): 199-214 (2024) - [c10]Samuele Germiniani, Daniele Nicoletti, Graziano Pravadelli:
Invited Talk: Pros and Cons of Assertion Mining. LATS 2024: 1-2 - 2023
- [c9]Alberto Bosio, Samuele Germiniani, Graziano Pravadelli, Marcello Traiola:
Exploiting assertions mining and fault analysis to guide RTL-level approximation. DATE 2023: 1-2 - 2022
- [j2]Samuele Germiniani
, Graziano Pravadelli
:
HARM: A Hint-Based Assertion Miner. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41(11): 4277-4288 (2022) - [j1]Samuele Germiniani
, Alessandro Danese, Graziano Pravadelli
:
Automatic Generation of Assertions for Detection of Firmware Vulnerabilities Through Alignment of Symbolic Sequences. IEEE Trans. Emerg. Top. Comput. 10(2): 728-739 (2022) - [c8]Michele Boldo, Nicola Bombieri, Mirco De Marchi, Luca Geretti, Samuele Germiniani, Graziano Pravadelli:
Risk Assessment and Prediction in Human-Robot Interaction Through Assertion Mining and Pose Estimation. LATS 2022: 1-5 - [c7]Alberto Bosio, Moreno Bragaglio, Samuele Germiniani, Samuele Mori, Graziano Pravadelli, Marcello Traiola
:
Assertion-aware approximate computing design exploration on behavioral models. LATS 2022: 1-6 - [c6]Samuele Germiniani, Graziano Pravadelli:
Exploiting clustering and decision-tree algorithms to mine LTL assertions containing non-boolean expressions. VLSI-SoC 2022: 1-6 - 2021
- [c5]Stefano Aldegheri, Nicola Bombieri, Samuele Germiniani, Federico Moschin, Graziano Pravadelli
:
A containerized ROS-compliant verification environment for robotic systems. DATE 2021: 222-225 - [c4]Moreno Bragaglio, Nicola Donatelli, Samuele Germiniani, Graziano Pravadelli
:
System-level bug explanation through program slicing and instruction clusterization. VLSI-SoC 2021: 1-6 - [c3]Moreno Bragaglio, Samuele Germiniani, Graziano Pravadelli:
Exploiting Program Slicing and Instruction Clusterization to Identify the Cause of Faulty Temporal Behaviours at System Level. VLSI-SoC (Selected Papers) 2021: 71-92 - 2020
- [c2]Samuele Germiniani, Moreno Bragaglio, Graziano Pravadelli
:
MIST: monitor generation from informal specifications for firmware verification. VLSI-SOC 2020: 111-116 - [c1]Samuele Germiniani, Moreno Bragaglio, Graziano Pravadelli:
From Informal Specifications to an ABV Framework for Industrial Firmware Verification. VLSI-SoC (Selected Papers) 2020: 179-204
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