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Suhail Basalama
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2020 – today
- 2024
- [c6]Neha Prakriya
, Yuze Chi
, Suhail Basalama
, Linghao Song
, Jason Cong
:
TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs. ASPLOS (3) 2024: 966-980 - 2023
- [j1]Suhail Basalama
, Atefeh Sohrabizadeh
, Jie Wang
, Licheng Guo
, Jason Cong
:
FlexCNN: An End-to-end Framework for Composing CNN Accelerators on FPGA. ACM Trans. Reconfigurable Technol. Syst. 16(2): 23:1-23:32 (2023) - [c5]Suhail Basalama, Jie Wang, Jason Cong:
A Comprehensive Automated Exploration Framework for Systolic Array Designs. DAC 2023: 1-6 - [c4]Linghao Song
, Licheng Guo
, Suhail Basalama
, Yuze Chi
, Robert F. Lucas
, Jason Cong
:
Callipepla: Stream Centric Instruction Set and Mixed Precision for Accelerating Conjugate Gradient Solver. FPGA 2023: 247-258 - [i2]Neha Prakriya, Yuze Chi, Suhail Basalama, Linghao Song, Jason Cong:
TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs. CoRR abs/2311.10189 (2023) - 2022
- [c3]Suhail Basalama, Atefeh Sohrabizadeh, Jie Wang, Jason Cong:
A Versatile Systolic Array for Transposed and Dilated Convolution on FPGA. FCCM 2022: 1-2 - [i1]Linghao Song, Licheng Guo, Suhail Basalama, Yuze Chi, Robert F. Lucas, Jason Cong:
Callipepla: Stream Centric Instruction Set and Mixed Precision for Accelerating Conjugate Gradient Solver. CoRR abs/2209.14350 (2022) - 2021
- [c2]Atiyehsadat Panahi, Suhail Basalama, Ange-Thierry Ishimwe, Joel Mandebi Mbongue, David Andrews
:
A Customizable Domain-Specific Memory-Centric FPGA Overlay for Machine Learning Applications. FPL 2021: 24-27 - 2020
- [c1]Suhail Basalama, Atiyehsadat Panahi, Ange-Thierry Ishimwe, David Andrews
:
SPAR-2: A SIMD Processor Array for Machine Learning in IoT Devices. ICDIS 2020: 141-147
Coauthor Index
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last updated on 2024-05-06 21:15 CEST by the dblp team
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