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Mingtao Zhan
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2020 – today
- 2024
- [j5]Jinshan Yue
, Yongpan Liu
, Xiaoyu Feng
, Yifan He, Jingyu Wang
, Zhe Yuan, Mingtao Zhan
, Jiaxin Liu
, Jian-Wei Su
, Yen-Lin Chung, Ping-Chun Wu, Li-Yang Hong, Meng-Fan Chang
, Nan Sun, Chunmeng Dou
, Xueqing Li
, Ming Liu
, Huazhong Yang
:
An Energy-Efficient Computing-in-Memory NN Processor With Set-Associate Blockwise Sparsity and Ping-Pong Weight Update. IEEE J. Solid State Circuits 59(5): 1612-1627 (2024) - [j4]Mingtao Zhan
, Lu Jie, Xiyuan Tang
, Yi Zhong, Nan Sun:
A 0.004-mm2 200-MS/s Pipelined SAR ADC With kT/C Noise Cancellation and Robust Ring-Amp. IEEE J. Solid State Circuits 59(7): 2209-2218 (2024) - 2023
- [j3]Xiangxing Yang
, Keren Zhu
, Xiyuan Tang
, Meizhi Wang
, Mingtao Zhan, Nanshu Lu
, Jaydeep P. Kulkarni
, David Z. Pan
, Yongpan Liu
, Nan Sun:
An In-Memory-Computing Charge-Domain Ternary CNN Classifier. IEEE J. Solid State Circuits 58(5): 1450-1461 (2023) - [j2]Mingtao Zhan
, Lu Jie, Yi Zhong
, Nan Sun:
A 10-mW 10-ENoB 1-GS/s Ring-Amp-Based Pipelined TI-SAR ADC With Split MDAC and Switched Reference Decoupling Capacitor. IEEE J. Solid State Circuits 58(12): 3576-3585 (2023) - [c9]Yi Zhong
, Mingtao Zhan, Wei Wang, Xiyuan Tang, Lu Jie, Nan Sun:
An 80.2-to-89.1dB-SNDR 24k-to-200kHz-BW VCO-Based Synthesized ?S ADC with 105dB SFDR in 28-nm CMOS. CICC 2023: 1-2 - [c8]Zongnan Wang, Lu Jie, Zichen Kong, Mingtao Zhan, Yi Zhong
, Yuan Wang, Xiyuan Tang:
A 150kHz-BW 15-ENOB Incremental Zoom ADC with Skipped Sampling and Single Buffer Embedded Noise-Shaping SAR Quantizer. ISSCC 2023: 176-177 - [c7]Mingtao Zhan, Lu Jie, Nan Sun:
A 10mW 10-ENOB 1GS/s Ring-Amp-Based Pipelined TI-SAR ADC with Split MDAC and Switched Reference Decoupling Capacitor. ISSCC 2023: 272-273 - [c6]Jinshan Yue, Mingtao Zhan, Zi Wang, Yifan He, Yaolei Li, Songming Yu, Wenyu Sun, Lu Jie, Chunmeng Dou, Xueqing Li, Nan Sun, Huazhong Yang, Ming Liu, Yongpan Liu:
A 5.6-89.9TOPS/W Heterogeneous Computing-in-Memory SoC with High-Utilization Producer-Consumer Architecture and High-Frequency Read-Free CIM Macro. VLSI Technology and Circuits 2023: 1-2 - 2022
- [c5]Lu Jie, Mingtao Zhan, Xiyuan Tang, Nan Sun:
A 0.014mm2 10kHz-BW Zoom-Incremental-Counting ADC Achieving 103dB SNDR and 100dB Full-Scale CMRR. ISSCC 2022: 1-3 - [c4]Mingtao Zhan, Lu Jie, Xiyuan Tang, Nan Sun:
A 0.004mm2 200MS/S Pipelined SAR ADC with kT/C Noise Cancellation and Robust Ring-Amp. ISSCC 2022: 164-166 - 2021
- [j1]Jiaxin Liu
, Xing Wang, Zijie Gao, Mingtao Zhan, Xiyuan Tang
, Chen-Kai Hsu
, Nan Sun:
A 90-dB-SNDR Calibration-Free Fully Passive Noise-Shaping SAR ADC With 4× Passive Gain and Second-Order DAC Mismatch Error Shaping. IEEE J. Solid State Circuits 56(11): 3412-3423 (2021) - [c3]Xiangxing Yang, Keren Zhu
, Xiyuan Tang, Meizhi Wang
, Mingtao Zhan, Nanshu Lu, Jaydeep P. Kulkarni, David Z. Pan, Yongpan Liu, Nan Sun:
An In-Memory-Computing Charge-Domain Ternary CNN Classifier. CICC 2021: 1-2 - [c2]Jinshan Yue, Xiaoyu Feng, Yifan He, Yuxuan Huang
, Yipeng Wang, Zhe Yuan, Mingtao Zhan, Jiaxin Liu, Jian-Wei Su, Yen-Lin Chung, Ping-Chun Wu, Li-Yang Hung, Meng-Fan Chang, Nan Sun, Xueqing Li, Huazhong Yang, Yongpan Liu:
A 2.75-to-75.9TOPS/W Computing-in-Memory NN Processor Supporting Set-Associate Block-Wise Zero Skipping and Ping-Pong CIM with Simultaneous Computation and Weight Updating. ISSCC 2021: 238-240 - 2020
- [c1]Jiaxin Liu, Xing Wang, Zijie Gao, Mingtao Zhan, Xiyuan Tang, Nan Sun:
9.3 A 40kHz-BW 90dB-SNDR Noise-Shaping SAR with 4× Passive Gain and 2nd-Order Mismatch Error Shaping. ISSCC 2020: 158-160
Coauthor Index
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last updated on 2024-07-20 21:23 CEST by the dblp team
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