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ORCIDArne Heittmann
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2020 – today
- 2024
[c16]Mohammad Hizzani, Arne Heittmann, George Higgins Hutchinson, Dmitrii Dobrynin, Thomas Van Vaerenbergh, Tinish Bhattacharya, Adrien Renaudineau, Dmitri B. Strukov, John Paul Strachan:
Memristor-based hardware and algorithms for higher-order Hopfield optimization solver outperforming quadratic Ising machines. ISCAS 2024: 1-5- 2023
- [i2]Mohammad Hizzani, Arne Heittmann, George Higgins Hutchinson, Dmitrii Dobrynin
, Thomas Van Vaerenbergh, Tinish Bhattacharya, Adrien Renaudineau, Dmitri B. Strukov, John Paul Strachan:
Memristor-based hardware and algorithms for higher-order Hopfield optimization solver outperforming quadratic Ising machines. CoRR abs/2311.01171 (2023)
2010 – 2019
- 2018
- [c15]Arne Heittmann, Tobias G. Noll:
Architecture and optimization of associative memories used for the implementation of logic functions based on nanoelectronic 1S1R cells. DATE 2018: 1496-1499 - 2017
- [c14]Arne Heittmann, Tobias G. Noll:
Mixing circuit based on neural associative memories and nanoelectronic 1S1R cells. NANOARCH 2017: 119-124 - 2014
- [c13]Arne Heittmann, Tobias G. Noll:
Variability analysis of a hybrid CMOS/RS nanoelectronic calibration circuit. ISCAS 2014: 1656-1659 - [i1]Christian Mayr, Arne Heittmann, René Schüffny:
Gabor-like Image Filtering using a Neural Microcircuit. CoRR abs/1408.1986 (2014) - 2013
- [c12]Arne Heittmann, Tobias G. Noll:
Modeling variability and irreproducibility of nanoelectronic resistive switches for circuit simulation. ASP-DAC 2013: 503-508 - [c11]Arne Heittmann, Tobias G. Noll:
Variability evaluation of feedback circuits used in nanoelectronic Memristive/CMOS circuits. ACM Great Lakes Symposium on VLSI 2013: 137-142 - [c10]Qin Wang, Arne Heittmann, Tobias G. Noll:
Analysis of the area-delay performance of hybrid nanoelectronic memory cores used in field programmable gate arrays. ACM Great Lakes Symposium on VLSI 2013: 233-238 - 2012
- [c9]Arne Heittmann, Tobias G. Noll:
A hybrid CMOS/memristive nanoelectronic circuit for programming synaptic weights. ESANN 2012 - [c8]Arne Heittmann, Tobias G. Noll:
Limits of writing multivalued resistances in passive nanoelectronic crossbars used in neuromorphic circuits. ACM Great Lakes Symposium on VLSI 2012: 227-232 - [c7]Arne Heittmann, Tobias G. Noll:
A Monte Carlo analysis of a write method used in passive nanoelectronic crossbars. NANOARCH 2012: 93-100 - 2011
- [c6]Arne Heittmann, Tobias G. Noll:
Sensitivity of neuromorphic circuits using nanoelectronic resistive switches to pulse synchronization. ACM Great Lakes Symposium on VLSI 2011: 375-378
2000 – 2009
- 2007
- [j2]Christian Mayr, Arne Heittmann, René Schüffny:
Gabor-Like Image Filtering Using a Neural Microcircuit. IEEE Trans. Neural Networks 18(3): 955-959 (2007) - 2005
- [j1]Peter Benkart, Alexander Kaiser, Andreas Munding, Markus Bschorr, Hans-Jörg Pfleiderer, Erhard Kohn, Arne Heittmann, Holger Huebner, Ulrich Ramacher:
3D Chip Stack Technology Using Through-Chip Interconnects. IEEE Des. Test Comput. 22(6): 512-518 (2005) - 2004
- [c5]Jörg Schreiter, Ulrich Ramacher, Arne Heittmann, Daniel Matolin, René Schüffny:
Pulse coupled neural networks with adaptive synapses for image segmentation. ARCS Workshops 2004: 275-282 - [c4]Jörg Schreiter, Ulrich Ramacher, Arne Heittmann, Daniel Matolin, René Schüffny:
Cellular pulse-coupled neural network with adaptive weights for image segmentation and its VLSI implementation. Image Processing: Algorithms and Systems 2004: 290-296 - 2003
- [b1]Arne Heittmann:
Ressourceneffiziente Architekturen neuronaler Assoziativspeicher. University of Paderborn, Germany, 2003, ISBN 978-3-935433-35-8, pp. 1-235 - [c3]Arne Heittmann, Ulrich Ramacher:
Correlation-based feature detection using pulsed neural networks. NNSP 2003: 479-488 - 2002
- [c2]Arne Heittmann, Ulrich Ramacher, Daniel Matolin, Jörg Schreiter, René Schüffny:
An Analog VLSI Pulsed Neural Network for Image Segmentation Using Adaptive Connection Weights. ICANN 2002: 1293-1298 - [c1]Jörg Schreiter, Ulrich Ramacher, Arne Heittmann, D. Matolini, René Schüffny:
Analog implementation for networks of integrate-and-fire neurons with adaptive local connectivity. NNSP 2002: 657-666
Coauthor Index
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