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ORCIDFabian Klass
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2000 – 2009
- 2008
[c10]Juan C. Rey, N. S. Nagaraj, Andrew B. Kahng, Fabian Klass, Rob Aitken, Cliff Hou, Luigi Capodieci, Vivek Singh:
DFM in practice: hit or hype? DAC 2008: 898-899- [c9]Fabian Klass, Ashish Jain, Greg Hess, Brian Park:
An All-Digital On-Chip Process-Control Monitor for Process-Variability Measurements. ISSCC 2008: 408-409 - 2007
- [c8]Daniel Murray, James Burnette, Brian Campbell, Mark Chung, Bruce Fernandes, Subhendra Ghosh, Rajat Goel, Greg Hess, Hang Huang, Zhibin Huang, Naveen Javarappa, Pradeep Kanapathipillai, Fabian Klass, Fang Liu, Anup Mehta, Yamini Modukuru, Nishant Nerurkar, Abhijit Radhakrishnan, Sribalan Santhanam, Junji Sugisawa, Shyam Sundar, Honkai John Tam, Ricky Wen, Eric Wu, Jung-Cheng Yeh, John Yong, Sanjay Zambare:
A 2GHz, 7W (max) 64b PowerTM Microprocessor Core. CICC 2007: 725-728 - [c7]Zongjian Chen, Priya Ananthanarayanan, Sukalp Biswas, Brian Campbell, Hao Chen, Shaishav Desai, Dominic Go, Rajat Goel, Vincent von Kaenel, Jason Kassoff, Fabian Klass, Weichun Ku, Tony Li, Jonathon Lin, Khurram Malik, Anup Mehta, Daniel Murray, Eric Shiu, Chris Shuler, Sribalan Santhanam, Greg Scott, Junji Sugisawa, Toshinari Takayanagi, Honkai John Tarn, Pradeep Trivedi, James Wang, Ricky Wen, John Yong:
A 25W SoC with Dual 2GHz Power Cores and Integrated Memory and I/O Subsystems. ISSCC 2007: 104-105 - 2002
- [c6]Rita Yu Chen, Paul Yip, Georgios K. Konstadinidis, Andrew Demas, Fabian Klass, Robert E. Mains, Margaret Schmitt, Dina Bistry:
Timing Window Applications in UltraSPARC-IIIi? Microprocessor Design. ICCD 2002: 158-163 - 2000
- [j4]Raymond A. Heald, Kathirgamar Aingaran, Chaim Amir, Michael Ang, Michael Boland, Pankaj Dixit, Gary Gouldsberry, Dale Greenley, Joel Grinberg, Jason M. Hart, Tim Horel, Wen-Jay Hsu, James M. Kaku, Chin Kim, Song Kim, Fabian Klass, Hang Kwan, Gary Lauterbach, Roger Lo, Hugh McIntyre, Anup Mehta, David Murata, Sophie Nguyen, Yet-Ping Pai, Subeer Patel, Ken Shin, Kenway Tam, Sai Vishwanthaiah, John Wu, Gin Yee, Eileen You:
A third-generation SPARC V9 64-b microprocessor. IEEE J. Solid State Circuits 35(11): 1526-1538 (2000) - [c5]Kathirgamar Aingaran, Fabian Klass, Chin-Man Kim, Chaim Amir, Joydeep Mitra, Eileen You, Jamil Mohd, Sai-keung Dong:
Coupling Noise Analysis for VLIS and ULSI Circuits. ISQED 2000: 485-490
1990 – 1999
- 1999
- [j3]Fabian Klass, Chaim Amir, Ashutosh Das, Kathirgamar Aingaran, Cindy Truong, Richard Wang, Anup Mehta, Raymond A. Heald, Gin Yee:
A new family of semidynamic and dynamic flip-flops with embedded logic for high-performance processors. IEEE J. Solid State Circuits 34(5): 712-716 (1999) - 1998
- [j2]Wayne P. Burleson, Maciej J. Ciesielski, Fabian Klass, W. Liu:
Wave-pipelining: a tutorial and research survey. IEEE Trans. Very Large Scale Integr. Syst. 6(3): 464-474 (1998) - 1994
- [j1]Fabian Klass, Michael J. Flynn, Ad J. van de Goor:
Fast multiplication in VLSI using wave pipelining techniques. J. VLSI Signal Process. 7(3): 233-248 (1994) - [c4]Fabian Klass, Michael J. Flynn, Ad J. van de Goor:
A 16x16-bit Static CMOS Wave-Pipelined Multiplier. ISCAS 1994: 143-146 - [c3]Wayne P. Burleson, Leonard W. Cotten, Fabian Klass, Maciej J. Ciesielski:
Forum: Wave-pipelining: Is it Practical? ISCAS 1994: 163-166 - 1992
- [c2]Fabian Klass, Johannes M. Mulder:
Use of CMOS Technology in Wave Pipelining. VLSI Design 1992: 303-308 - 1991
- [c1]Fabian Klass, Uri C. Weiser:
Efficient Systolic Array for Matrix Multiplication. ICPP (3) 1991: 21-25
Coauthor Index
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