![](https://dblp.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
default search action
Kenichi Ohhata
Person information
Refine list
![note](https://dblp.uni-trier.de/img/note-mark.dark.12x12.png)
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2023
- [c8]Yusuke Toyoshima, Ryosuke Kamiya, Kenichi Ohhata:
High-Precision Open-Loop Time Amplifier Using Current Regulator. APCCAS 2023: 276-279 - 2022
- [c7]Daiki Ogata, Ryosuke Kamiya, Yusuke Toyoshima, Kenichi Ohhata:
A High-Time-Resolution Time-to-Digital Converter Using Coupled Ring Oscillator with Phase Averaging. APCCAS 2022: 195-198 - 2021
- [c6]Chiwen Cheng, Kenichi Ohhata:
A PVT-Robust Closed-Loop Dynamic Amplifier Using Three-Stage Floating Inverter Amplifier. APCCAS 2021: 89-92
2010 – 2019
- 2019
- [j18]Kenichi Ohhata
:
A 2.3-mW, 1-GHz, 8-Bit Fully Time-Based Two-Step ADC Using a High-Linearity Dynamic VTC. IEEE J. Solid State Circuits 54(7): 2038-2048 (2019) - 2018
- [j17]Kenichi Ohhata
, Daiki Hayakawa, Kenji Sewaki, Kento Imayanagida, Kouki Ueno, Yuuki Sonoda, Kenichiro Muroya:
A 900-MHz, 3.5-mW, 8-bit Pipelined Subranging ADC Combining Flash ADC and TDC. IEEE Trans. Very Large Scale Integr. Syst. 26(9): 1777-1787 (2018) - [c5]Kenichi Ohhata:
Low-Power, High-Speed Time-Based Subranging ADCs. ISPACS 2018: 463-468 - [c4]Kenichi Ohhata:
A 2.3-MW, 950-MHz, 8-Bit Fully-Time-Based Subranging ADC Using Highly-Linear Dynamic VTC. VLSI Circuits 2018: 95-96 - 2014
- [j16]Wataru Yoshimura, Kenichi Ohhata:
Automatic technique of distortion compensation in resistor ladder for high-speed and low-power ADC. IEICE Electron. Express 11(11): 20140313 (2014) - [j15]Kenichi Ohhata:
1-GHz, 17.5-mW, 8-bit Subranging ADC Using Offset-Cancelling Charge-Steering Amplifier. IEICE Trans. Electron. 97-C(4): 289-297 (2014) - [c3]Kenichi Ohhata, Hiroki Nakahara, Takuya Inoue, Toru Yazaki, Norio Chujo, Takuma Nishimoto:
Automatic adjustment system for optical interconnection transmitter using improved particle swarm optimization. ISIC 2014: 584-587 - 2011
- [j14]Kenichi Ohhata, Hiroki Date, Mai Arita:
Low-Offset, Low-Power Latched Comparator Using Capacitive Averaging Technique. IEICE Trans. Electron. 94-C(12): 1889-1895 (2011) - [j13]Norio Chujo, Toshiaki Takai, Toshiki Sugawara, Yasunobu Matsuoka, Daichi Kawamura, Koichiro Adachi, Tsuneo Kawamata, Tsuneo Ohno, Kenichi Ohhata:
A 25 Gb/s 65-nm CMOS Low-Power Laser Diode Driver With Mutually Coupled Peaking Inductors for Optical Interconnects. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(9): 2061-2068 (2011) - 2010
- [c2]Norio Chujo, Tsuneo Kawamata, Kenichi Ohhata, Toshinobu Ohno:
A 25Gb/s laser diode driver with mutually coupled peaking inductors for optical interconnects. CICC 2010: 1-4 - [c1]Kenichi Ohhata, Hironori Imamura, Toshinobu Ohno, Takaya Taniguchi, Kiichi Yamashita, Toru Yazaki, Norio Chujo:
17 Gb/s VCSEL driver using double-pulse asymmetric emphasis technique in 90-nm CMOS for optical interconnection. ISCAS 2010: 1847-1850
2000 – 2009
- 2009
- [j12]Kenichi Ohhata, Koki Uchino, Yuichiro Shimizu, Kosuke Oyama, Kiichi Yamashita:
Design of a 770-MHz, 70-mW, 8-bit Subranging ADC Using Reference Voltage Precharging Architecture. IEEE J. Solid State Circuits 44(11): 2881-2890 (2009) - 2008
- [j11]Kenichi Ohhata, Yuichiro Shimizu, Kiichi Yamashita:
Feedthrough reduction technique for track-and-hold circuit with body-bias control circuit. IEICE Electron. Express 5(13): 478-482 (2008) - [j10]Takuma Nishimoto, Kiichi Yamashita, Kenichi Ohhata:
Sandwich Structure Type RF-MEMS Variable Capacitor with Low Voltage Controllability and Wide Tuning Range. IEICE Trans. Commun. 91-B(2): 572-574 (2008) - 2007
- [j9]Kenichi Ohhata, Kosuke Yayama, Yuichiro Shimizu, Kiichi Yamashita:
A 1-GHz, 56.3-dB SFDR CMOS track-and-hold circuit with body-bias control circuit. IEICE Electron. Express 4(22): 701-706 (2007) - 2006
- [j8]Kenichi Ohhata, Katsuyoshi Harasawa, Makoto Honda, Kiichi Yamashita:
Design of Low-Noise, Low-Power 10-GHz VCO Using 0.18-µm CMOS Technology. IEICE Trans. Electron. 89-C(2): 203-205 (2006) - 2005
- [j7]Toru Masuda, Kenichi Ohhata, Nobuhiro Shiramizu, Eiji Ohue, Katsuya Oda, Reiko Hayami, Hiromi Shimamoto, Masao Kondo, Takashi Harada, Katsuyoshi Washio:
SiGe-HBT-based 54-gb/s 4: 1 multiplexer IC with full-rate clock for serial communication systems. IEEE J. Solid State Circuits 40(3): 791-795 (2005) - 2000
- [j6]Kenichi Ohhata, Fumihiko Arakawa, Takeshi Kusunoki, Hiroaki Nambu, Kazuo Kanetani, Kaname Yamasaki, Keiichi Higeta, Masami Usami, Masahiko Nishiyama, Kunihiko Yamaguchi, Noriyuki Homma, Atsuo Hotta:
Power reduction techniques for a 1-Mb ECL-CMOS SRAM with an access time of 550 ps and an operating frequency of 900 MHz. IEEE J. Solid State Circuits 35(4): 564-571 (2000) - [j5]Hiroaki Nambu, Kazuo Kanetani, Kaname Yamasaki, Keiichi Higeta, Masami Usami, Masahiko Nishiyama, Kenichi Ohhata, Fumihiko Arakawa, Takeshi Kusunoki, Kunihiko Yamaguchi, Atsuo Hotta, Noriyuki Homma:
A 550-ps access 900-MHz 1-Mb ECL-CMOS SRAM. IEEE J. Solid State Circuits 35(8): 1159-1168 (2000)
1990 – 1999
- 1999
- [j4]Kenichi Ohhata, Toru Masuda, Kazuo Imai, Ryoji Takeyari, Katsuyoshi Washio:
A wide-dynamic-range, high-transimpedance Si bipolar preamplifier IC for 10-Gb/s optical fiber links. IEEE J. Solid State Circuits 34(1): 18-24 (1999) - [j3]Kenichi Ohhata, Toru Masuda, Eiji Ohue, Katsuyoshi Washio:
Design of a 32.7-GHz bandwidth AGC amplifier IC with wide dynamic range implemented in SiGe HBT. IEEE J. Solid State Circuits 34(9): 1290-1297 (1999) - 1996
- [j2]Keiichi Higeta, Masami Usami, Masayuki Ohayashi, Yasuhiro Fujimura, Masahiko Nishiyama, Satoru Isomura, Kunihiko Yamaguchi, Youji Idei, Hiroaki Nambu, Kenichi Ohhata, Nadateru Hanta:
A soft-error-immune 0.9-ns 1.15-Mb ECL-CMOS SRAM with 30-ps 120 k logic gates and on-chip test circuitry. IEEE J. Solid State Circuits 31(10): 1443-1450 (1996) - 1995
- [j1]Hiroalu Nambu, Kazuo Kanetani, Youji Idei, Tom Masuda, Keiichi Higeta, Masayuki Ohayashi, Masami Usami, Kunihiko Yamaguchi, Toshiyuki Kikuchi, Takahide Ikeda, Kenichi Ohhata, Takeshi Kusunoki, Noriyuki Homma:
A 0.65-ns, 72-kb ECL-CMOS RAM macro for a 1-Mb SRAM. IEEE J. Solid State Circuits 30(4): 491-499 (1995)
Coauthor Index
![](https://dblp.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-05-13 21:18 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint