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Journal Articles
- 2016
[j3]Takao Oshita, Joseph Shor, David E. Duarte, Avner Kornfeld, George L. Geannopoulos, Jonathan Douglas, Nasser A. Kurd:
A Compact First-Order ΣΔ Modulator for Analog High-Volume Testing of Complex System-on-Chips in a 14 nm Tri-Gate Digital CMOS Process. IEEE J. Solid State Circuits 51(2): 378-390 (2016)- 2015
- [j2]Takao Oshita, Joseph Shor, David E. Duarte, Avner Kornfeld, Dror Zilberman:
Compact BJT-Based Thermal Sensor for Processor Applications in a 14 nm tri-Gate CMOS Process. IEEE J. Solid State Circuits 50(3): 799-807 (2015) - 2013
- [j1]Li Lu, Scott T. Block, David E. Duarte, Changzhi Li
:
A 0.45-V MOSFETs-Based Temperature Sensor Front-End in 90 nm CMOS With a Noncalibrated ± 3.5°C 3σ Relative Inaccuracy From -55°C to 105°C. IEEE Trans. Circuits Syst. II Express Briefs 60-II(11): 771-775 (2013)
Conference and Workshop Papers
- 2022
- [c5]You Li, David E. Duarte, Yongping Fan:
A 90.9kS/s, 0.7nJ/conversion Hybrid Temperature Sensor in 4nm-class CMOS. VLSI Technology and Circuits 2022: 118-119 - 2010
- [c4]David E. Duarte, Suching Hsu, Keng L. Wong, Mingwei Huang, Greg Taylor:
Interpolated VCO design for a low bandwidth, low-jitter, self-biased PLL in 45 nm CMOS. CICC 2010: 1-4 - [c3]David E. Duarte, Paola Zepeda, Suching Hsu, Atul Maheshwari, Greg Taylor:
HVM performance validation and DFM techniques used in a 32nm CMOS thermal sensor system. CICC 2010: 1-4 - 2007
- [c2]David E. Duarte, George L. Geannopoulos, Usman Mughal, Keng L. Wong, Greg Taylor:
Temperature Sensor Design in a High Volume Manufacturing 65nm CMOS Digital Process. CICC 2007: 221-224 - [c1]David E. Duarte, Greg Taylor, Keng L. Wong, Usman Mughal, George L. Geannopoulos:
Advanced thermal sensing circuit and test techniques used in a high performance 65nm processor. ISLPED 2007: 304-309
Coauthor Index
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