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Mohammed E. Elbtity
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2020 – today
- 2024
- [i9]Mohammed E. Elbtity, Peyton Chandarana, Ramtin Zand:
Flex-TPU: A Flexible TPU with Runtime Reconfigurable Dataflow Architecture. CoRR abs/2407.08700 (2024) - [i8]Jinendra Malekar, Mohammed E. Elbtity, Ramtin Zand:
Matmul or No Matmul in the Era of 1-bit LLMs. CoRR abs/2408.11939 (2024) - 2023
- [c8]Mohammed E. Elbtity, Brendan Reidy, Md Hasibul Amin, Ramtin Zand:
Heterogeneous Integration of In-Memory Analog Computing Architectures with Tensor Processing Units. ACM Great Lakes Symposium on VLSI 2023: 607-612 - [c7]Md Hasibul Amin, Mohammed E. Elbtity, Ramtin Zand:
IMAC-Sim: : A Circuit-level Simulator For In-Memory Analog Computing Architectures. ACM Great Lakes Symposium on VLSI 2023: 659-664 - [c6]Brendan Reidy, Mohammadreza Mohammadi, Mohammed E. Elbtity, Heath Smith, Ramtin Zand:
Work in Progress: Real-time Transformer Inference on Edge AI Accelerators. RTAS 2023: 341-344 - [i7]Md Hasibul Amin, Mohammed E. Elbtity, Ramtin Zand:
IMAC-Sim: A Circuit-level Simulator For In-Memory Analog Computing Architectures. CoRR abs/2304.09252 (2023) - [i6]Mohammed E. Elbtity, Brendan Reidy, Md Hasibul Amin, Ramtin Zand:
Heterogeneous Integration of In-Memory Analog Computing Architectures with Tensor Processing Units. CoRR abs/2304.09258 (2023) - 2022
- [j3]Md Hasibul Amin, Mohammed E. Elbtity, Ramtin Zand:
Xbar-Partitioning: A Practical Way for Parasitics and Noise Tolerance in Analog IMC Circuits. IEEE J. Emerg. Sel. Topics Circuits Syst. 12(4): 867-877 (2022) - [j2]Mohammed E. Elbtity, Peyton Chandarana, Brendan Reidy, Jason Kamran Eshraghian, Ramtin Zand:
APTPU: Approximate Computing Based Tensor Processing Unit. IEEE Trans. Circuits Syst. I Regul. Pap. 69(12): 5135-5146 (2022) - [c5]Md Hasibul Amin, Mohammed E. Elbtity, Mohammadreza Mohammadi, Ramtin Zand:
MRAM-based Analog Sigmoid Function for In-memory Computing. ACM Great Lakes Symposium on VLSI 2022: 319-323 - [c4]Md Hasibul Amin, Mohammed E. Elbtity, Ramtin Zand:
Interconnect Parasitics and Partitioning in Fully-Analog In-Memory Computing Architectures. ISCAS 2022: 389-393 - [i5]Md Hasibul Amin, Mohammed E. Elbtity, Ramtin Zand:
Interconnect Parasitics and Partitioning in Fully-Analog In-Memory Computing Architectures. CoRR abs/2201.12480 (2022) - [i4]Md Hasibul Amin, Mohammed E. Elbtity, Mohammadreza Mohammadi, Ramtin Zand:
MRAM-based Analog Sigmoid Function for In-memory Computing. CoRR abs/2204.09918 (2022) - [i3]Md Hasibul Amin, Mohammed E. Elbtity, Ramtin Zand:
A Python Framework for SPICE Circuit Simulation of In-Memory Analog Computing Circuits. CoRR abs/2210.17410 (2022) - [i2]Md Hasibul Amin, Mohammed E. Elbtity, Ramtin Zand:
Reliability-Aware Deployment of DNNs on In-Memory Analog Computing Architectures. CoRR abs/2211.00590 (2022) - 2021
- [c3]Mohammed E. Elbtity, Abhishek Singh, Brendan Reidy, Xiaochen Guo, Ramtin Zand:
An In-Memory Analog Computing Co-Processor for Energy-Efficient CNN Inference on Mobile Devices. ISVLSI 2021: 188-193 - [i1]Mohammed E. Elbtity, Abhishek Singh, Brendan Reidy, Xiaochen Guo, Ramtin Zand:
An In-Memory Analog Computing Co-Processor for Energy-Efficient CNN Inference on Mobile Devices. CoRR abs/2105.13904 (2021) - 2020
- [c2]Mohammed E. Elbtity, Hyun-Wook Son, Dong-Yeong Lee, HyungWon Kim:
High Speed, Approximate Arithmetic Based Convolutional Neural Network Accelerator. ISOCC 2020: 71-72
2010 – 2019
- 2018
- [j1]Noha Shaarawy, Ahmed A. M. Emara, Ahmed M. El-Naggar, Mohammed E. Elbtity, Maged Ghoneima, Ahmed G. Radwan:
Design and analysis of 2T2M hybrid CMOS-Memristor based RRAM. Microelectron. J. 73: 75-85 (2018) - [c1]Mohammed E. Elbtity, Ahmed G. Radwan:
Small Area and Low Power Hybrid CMOS-Memristor Based FIFO for NoC. ISCAS 2018: 1-5
Coauthor Index
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last updated on 2024-09-30 00:56 CEST by the dblp team
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