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N. S. Aswathy
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2020 – today
- 2024
- [j2]N. S. Aswathy, Hemangee K. Kapoor:
Migration-aware slot-based memory request scheduler to guarantee QoS in DRAM-PCM hybrid memories. J. Syst. Archit. 152: 103174 (2024) - [c7]N. S. Aswathy, Hemangee K. Kapoor:
Write Intensity based Foresightful Page Migration for Hybrid memories. ISQED 2024: 1-8 - 2023
- [j1]N. S. Aswathy, Arnab Sarkar, Hemangee K. Kapoor:
A Predictable QoS-aware Memory Request Scheduler for Soft Real-time Systems. ACM Trans. Embed. Comput. Syst. 22(2): 39:1-39:25 (2023) - [c6]N. S. Aswathy, Hemangee K. Kapoor:
AGRAS: Aging and memory request rate aware scheduler for PCM memories. ISQED 2023: 1-8 - [c5]Aishwarya Gupta, N. S. Aswathy, Hemangee K. Kapoor:
Look before you leap: An Access-based Prudent Page Migration for Hybrid Memories. VLSI-SoC 2023: 1-6 - [c4]N. S. Aswathy, Deep Bhuinya, Hemangee K. Kapoor:
WIB-SAR: Write Intensity Based Selective Address Remapping. VLSID 2023: 1-6 - 2022
- [c3]N. S. Aswathy, Sreesiddesh Bhavanasi, Arnab Sarkar, Hemangee K. Kapoor:
SRS-Mig: Selection and Run-time Scheduling of page Migration for improved response time in hybrid PCM-DRAM memories. ACM Great Lakes Symposium on VLSI 2022: 217-222 - 2021
- [c2]N. S. Aswathy, Hemangee K. Kapoor, Arnab Sarkar:
A Soft Real-time Memory Request Scheduler for Phase Change Memory Systems. RTCSA 2021: 109-118
2010 – 2019
- 2017
- [c1]N. S. Aswathy, R. S. Reshma Raj, Abhijit Das, John Jose, V. R. Josna:
Adaptive Packet Throttling Technique for Congestion Management in Mesh NoCs. VDAT 2017: 337-344
Coauthor Index
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last updated on 2024-07-20 21:17 CEST by the dblp team
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