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2020 – today
- 2024
[c4]Manjith Baby Sarojam Chellam, Ramasubramanian Natarajan, Nagi Naganathan:
Logic locking emulator on FPGA: A conceptual view. VLSID 2024: 553-559- 2021
- [j4]Shathanaa Rajmohan
, N. Ramasubramanian, Nagi Naganathan:
Design Space Exploration for Reducing Cost of Hardware Trojan Detection and Isolation during Architectural Synthesis. J. Circuits Syst. Comput. 30(9): 2150156:1-2150156:27 (2021) - 2020
- [j3]Marshal Raj, Gopalakrishnan Lakshminarayanan, Seok-Bum Ko, Nagi Naganathan, N. Ramasubramanian:
Configurable Logic Blocks and Memory Blocks for Beyond-CMOS FPGA-Based Embedded Systems. IEEE Embed. Syst. Lett. 12(4): 113-116 (2020) - [j2]Shathanaa Rajmohan, N. Ramasubramanian, Nagi Naganathan:
Hybrid Evolutionary Design Space Exploration Algorithm With Defence Against Third Party IP Vulnerabilities. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2602-2614 (2020)
2010 – 2019
- 2019
- [j1]Kokila Jagadeesh, N. Ramasubramanian, Nagi Naganathan:
Resource Efficient Metering Scheme for Protecting SoC FPGA Device and IPs in IoT Applications. IEEE Trans. Very Large Scale Integr. Syst. 27(10): 2284-2295 (2019) - 2013
- [c3]Kaijian Shi, Nagi Naganathan:
Message from program chairs. SoCC 2013: 6 - [e1]Norbert Schuhmann, Kaijian Shi, Nagi Naganathan:
2013 IEEE International SOC Conference, Erlangen, Germany, September 4-6, 2013. IEEE 2013, ISBN 978-1-4799-1166-0 [contents]
2000 – 2009
- 2008
- [c2]Nagi Naganathan:
Standards in EDA: An Introduction. VLSI Design 2008: 727 - 2006
- [c1]A. V. S. S. Prasad, Jacob Mathews, Nagi Naganathan:
Low-Power Design Strategies for Mobile Computing. VLSI Design 2006: 3-4
Coauthor Index
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