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ORCIDAlireza Hasani
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Journal Articles
- 2022
[j5]Alireza Hasani
, Lukasz Lopacinski, Goran Panic, Rolf Kraemer:
High-Throughput Multi-Frame Decoding of QC-LDPC Codes With Modified Rejection-Based Minimum Finding. IEEE Access 10: 5378-5389 (2022)- [j4]Lukasz Lopacinski, Nebojsa Maletic, Goran Panic, Alireza Hasani, Jesús Gutiérrez, Eckhard Grass:
Real-Valued Spreading Sequences for PSSS Based High-Speed Wireless Systems. IEEE Access 10: 8673-8692 (2022) - 2021
- [j3]Alireza Hasani, Lukasz Lopacinski, Rolf Kraemer:
Reduced-complexity decoding implementation of QC-LDPC codes with modified shuffling. EURASIP J. Wirel. Commun. Netw. 2021(1): 183 (2021) - 2019
- [j2]Lukasz Lopacinski, Miroslav Marinkovic, Goran Panic, Mohamed Hussein Eissa, Alireza Hasani, Karthik KrishneGowda, Rolf Kraemer:
Data Link Layer Processor for 100 Gbps Terahertz Wireless Communications in 28 nm CMOS Technology. IEEE Access 7: 44489-44502 (2019) - 2016
- [j1]Alireza Hasani, Vahid Tabataba Vakili:
Power Allocation in Two-Way Relay Networks with MABC DF Protocol and No Instantaneous Channel State Information. Wirel. Pers. Commun. 87(4): 1415-1433 (2016)
Conference and Workshop Papers
- 2023
- [c21]Lukasz Lopacinski, Nebojsa Maletic, Rolf Kraemer, Alireza Hasani, Jesús Gutiérrez, Milos Krstic, Eckhard Grass:
Amplitude- and phase-modulated PSSS for wide bandwidth mixed analog-digital baseband processors in THz communication. VTC2023-Spring 2023: 1-6 - [c20]Alireza Hasani, Lukasz Lopacinski, Milos Krstic, Eckhard Grass:
Fully Parallel Fully Unrolled BP Decoding of LDPC and Polar Codes. WCNC 2023: 1-6 - 2022
- [c19]Alireza Hasani, Lukasz Lopacinski, Goran Panic, Eckhard Grass:
550 Gbps Fully Parallel Fully Unrolled LDPC Decoder in 28 nm CMOS Technology. EuCNC 2022: 429-433 - [c18]Lukasz Lopacinski, Alireza Hasani, Goran Panic, Nebojsa Maletic, Oliver Schrape, Jesús Gutiérrez, Milos Krstic, Eckhard Grass:
Ultra High-Speed BP Decoder for Polar Codes achieving 1.4 Tbps in 28 nm CMOS. EuCNC 2022: 434-439 - [c17]Alireza Hasani, Lukasz Lopacinski, Milos Krstic, Eckhard Grass:
1542 Gbps Fully Pipelined Fast-SSC Decoding of Polar Codes. PIMRC 2022: 1320-1325 - [c16]Lukasz Lopacinski, Alireza Hasani, Goran Panic, Nebojsa Maletic, Jesús Gutiérrez, Milos Krstic, Eckhard Grass, Rolf Kraemer:
A Hardware Optimized High Throughput LDPC Decoder Supporting 3 Tb/s in 28 nm CMOS. PIMRC 2022: 1326-1331 - [c15]Alireza Hasani, Lukasz Lopacinski, Milos Krstic, Eckhard Grass:
An Improved Stage-Combined Belief Propagation Decoding of Polar Codes. PIMRC 2022: 1344-1348 - [c14]Lukasz Lopacinski, Alireza Hasani, Goran Panic, Nebojsa Maletic, Jesús Gutiérrez, Milos Krstic, Eckhard Grass:
High-Speed SC Decoder for Polar Codes achieving 1.7 Tb/s in 28 nm CMOS. VLSI-SoC 2022: 1-6 - [c13]Alireza Hasani, Lukasz Lopacinski, Eckhard Grass:
Early Stopping of BP Polar Decoding Based on Parity-Check Sums. VTC Spring 2022: 1-5 - [c12]Lukasz Lopacinski, Alireza Hasani, Goran Panic, Nebojsa Maletic, Oliver Schrape, Jesús Gutiérrez, Milos Krstic, Eckhard Grass, Rolf Kraemer:
Ultra high speed 802.11n LDPC decoder with seven-stage pipeline in 28 nm CMOS. VTC Spring 2022: 1-5 - 2021
- [c11]Lukasz Lopacinski, Nebojsa Maletic, Alireza Hasani, Karthik KrishneGowda, Jesús Gutiérrez, Rolf Kraemer, Eckhard Grass:
A Study of Barker Spreading Codes for High-Speed PSSS Wireless Systems. EuCNC/6G Summit 2021: 112-117 - [c10]Lukasz Lopacinski, Nebojsa Maletic, Alireza Hasani, Jesús Gutiérrez, Eckhard Grass:
Investigation of Real-Valued Spreading Sequences for DSSS and PSSS. ISWCS 2021: 1-6 - [c9]Lukasz Lopacinski, Alireza Hasani, Nebojsa Maletic, Jesús Gutiérrez, Rolf Kraemer, Eckhard Grass:
Modulation and Coding Schemes for Variable-Rate Parallel Sequence Spread Spectrum. PIMRC 2021: 446-451 - [c8]Lukasz Lopacinski, Nebojsa Maletic, Alireza Hasani, Jesús Gutiérrez, Eckhard Grass:
A Study of Hardware Complexity for PSSS Systems Based on Real-Valued Spreading Sequences. VTC Fall 2021: 1-5 - 2020
- [c7]Alireza Hasani, Lukasz Lopacinski, Steffen Büchner, Jörg Nolte, Rolf Kraemer:
A Modified Rejection-Based Architecture to Find the First Two Minima in Min-Sum-Based LDPC Decoders. WCNC 2020: 1-6 - 2019
- [c6]Lukasz Lopacinski, Mohamed Hussein Eissa, Goran Panic, Alireza Hasani, Rolf Kraemer:
Modular Data Link Layer Processing for THz communication. DDECS 2019: 1-5 - [c5]Alireza Hasani, Lukasz Lopacinski, Steffen Büchner, Jörg Nolte, Rolf Kraemer:
An Unnoticed Property in QC-LDPC Codes to Find the Message from the Codeword in Non-Systematic Codes. EuCNC 2019: 6-9 - [c4]Alireza Hasani, Lukasz Lopacinski, Steffen Büchner, Jörg Nolte, Rolf Kraemer:
A Modified Shuffling Method to Split the Critical Path Delay in Layered Decoding of QC-LDPC Codes. PIMRC 2019: 1-6 - 2018
- [c3]Steffen Büchner, Alireza Hasani, Lukasz Lopacinski, Rolf Kraemer, Jörg Nolte:
100 Gbit/s End-to-End Communication: Adding Flexibility with Protocol Templates. LCN 2018: 263-266 - [c2]Lukasz Lopacinski, Mohamed Hussein Eissa, Goran Panic, Marcin Brzozowski, Alireza Hasani, Rolf Kraemer:
Implementation of a Multi-Core Data Link Layer Processor for THz Communication. VTC Spring 2018: 1-5 - 2017
- [c1]Steffen Büchner, Jörg Nolte, Alireza Hasani, Rolf Kraemer:
100 Gbit/s End-to-End Communication: Low Overhead On-Demand Protocol Replacement in High Data Rate Communication Systems. LCN 2017: 231-234
Coauthor Index
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