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Mahmoud A. Elmohr
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2020 – today
- 2023
- [c8]Haohao Liao, Mahmoud A. Elmohr, Xuan Dong, Yanjun Qian, Wenzhe Yang
, Zhiwei Shang, Yin Tan:
TurboHE: Accelerating Fully Homomorphic Encryption Using FPGA Clusters. IPDPS 2023: 788-797 - 2020
- [c7]Mahmoud Khalafalla, Mahmoud A. Elmohr, Catherine H. Gebotys:
Going Deep: Using deep learning techniques with simplified mathematical models against XOR BR and TBR PUFs (Attacks and Countermeasures). HOST 2020: 80-90 - [c6]Mahmoud A. Elmohr, Haohao Liao, Catherine H. Gebotys:
EM Fault Injection on ARM and RISC-V. ISQED 2020: 206-212 - [i1]Mahmoud Khalafalla, Mahmoud A. Elmohr, Catherine H. Gebotys:
Going Deep: Using deep learning techniques with simplified mathematical models against XOR BR and TBR PUFs (Attacks and Countermeasures). CoRR abs/2009.04063 (2020)
2010 – 2019
- 2018
- [c5]Mahmoud A. Elmohr, Sachin Kumar, Mustafa Khairallah
, Anupam Chattopadhyay:
A Hardware-Efficient Implementation of CLOC for On-chip Authenticated Encryption. ISVLSI 2018: 311-315 - [c4]Mahmoud A. Elmohr, Ahmed S. Eissa, Moamen Ibrahim, Mostafa Khamis
, Sameh El-Ashry
, Ahmed Shalaby
, Mohamed Abdelsalam, M. Watheq El-Kharashi:
RVNoC: A Framework for Generating RISC-V NoC-Based MPSoC. PDP 2018: 617-621 - 2017
- [c3]Ahmed S. Eissa, Moamen A. Ibrahem, Mahmoud A. Elmohr, Yasmin Zamzam, Ahmed El-Yamany, Sameh El-Ashry
, Mostafa Khamis
, Ahmed Shalaby
:
A reusable verification environment for NoC platforms using UVM. EUROCON 2017: 239-242 - 2016
- [c2]Ahmed S. Eissa, Mahmoud A. Elmohr, Mostafa A. Saleh, Khaled E. Ahmed, Mohammed M. Farag
:
SHA-3 Instruction Set Extension for A 32-bit RISC processor architecture. ASAP 2016: 233-234 - [c1]Mahmoud A. Elmohr, Mostafa A. Saleh, Ahmed S. Eissa, Khaled E. Ahmed, Mohammed M. Farag
:
Hardware implementation of a SHA-3 application-specific instruction set processor. ICM 2016: 109-112
Coauthor Index
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last updated on 2024-04-24 23:18 CEST by the dblp team
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