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Chenkun Wang
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- affiliation: University of California, Riverside, CA, USA
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Journal Articles
- 2020
- [j3]Chenkun Wang
, Feilong Zhang
, Fei Lu
, Qi Chen
, Cheng Li
, Albert Z. Wang
:
A Study of Transient Voltage Peaking in Diode-Based ESD Protection Structures in 28nm CMOS. IEEE Access 8: 87164-87172 (2020) - 2019
- [j2]Feilong Zhang
, Chenkun Wang
, Fei Lu
, Qi Chen
, Cheng Li, X. Shawn Wang
, Daguang Li, Albert Z. Wang
:
A Full-Chip ESD Protection Circuit Simulation and Fast Dynamic Checking Method Using SPICE and ESD Behavior Models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(3): 489-498 (2019) - 2016
- [j1]Fei Lu, Rui Ma, Zongyu Dong, Li Wang, Chen Zhang, Chenkun Wang, Qi Chen, X. Shawn Wang, Feilong Zhang, Cheng Li, He Tang, Yuhua Cheng, Albert Z. Wang:
A Systematic Study of ESD Protection Co-Design With High-Speed and High-Frequency ICs in 28 nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(10): 1746-1757 (2016)
Conference and Workshop Papers
- 2022
- [c8]Zhendong Guo, Ahmed Mostafa, A. Elshazly, Bo Chen, B. Wang, C. Han, Chenkun Wang, D. Zhou, Davide Visani, Edmund Hsiao, F. Chu, Fei Lu, G. Cui, H. Zhang, H. Wang, H. Zhao, J. Lin, J. Gu, L. Luo, L. Jiang, M. Singh, M. Gambhir, Mehedi Hasan, M. Wu, M. J. Yoo, P. Liu, S. Kollu, T. Ye, X. Zhao, X. Yang, X. Han, Y. Huang, Y. Sun, Z. Yu, Z. H. Jiang, Z. Adal, Z. Yan:
A 112.5Gb/s ADC-DSP-Based PAM-4 Long-Reach Transceiver with >50dB Channel Loss in 5nm FinFET. ISSCC 2022: 116-118 - 2018
- [c7]Chenkun Wang, Fei Lu, Qi Chen, Feilong Zhang, Cheng Li, Dawn Wang, Albert Z. Wang:
A study of impacts of ESD protection on 28/38GHz RF switches in 45nm SOI CMOS for 5G mobile applications. RWS 2018: 157-160 - [c6]Qi Chen, Chenkun Wang, Feilong Zhang, Cheng Li, Albert Z. Wang:
3D heterogeneous integration enabling future RF ICs. RWS 2018: 188-190 - 2017
- [c5]Qi Chen, Cheng Li, Fei Lu, Chenkun Wang, Feilong Zhang, Tianru Wu, Xiaoming Xie, Kun Zhang, Xinxin Li, Jimmy Ng, Ya-Hong Xie, Yuhua Cheng, Albert Z. Wang:
Characterization of single-crystalline graphene ESD interconnects. ASICON 2017: 977-980 - [c4]Albert Z. Wang, Fei Lu, Qi Chen, Chenkun Wang, Cheng Li, Feilong Zhang:
Key note: Integrated design-for-reliability for ICs. LASCAS 2017: 1-4 - [c3]Albert Z. Wang, Qi Chen, Cheng Li, Fei Lu, Chenkun Wang, Feilong Zhang, X. Shawn Wang, Jimmy Ng, Ya-Hong Xie, Rui Ma, Li Wang, Lin Lin:
More-Than-Moore: 3D heterogeneous integration into CMOS technologies. NEMS 2017: 1-4 - [c2]Qi Chen, Cheng Li, Fei Lu, Chenkun Wang, Feilong Zhang, Albert Z. Wang, Jimmy Ng, Ya-Hong Xie:
TLP measurement and analysis of graphene NEMS switches for on-chip ESD protection. NEMS 2017: 370-374 - 2015
- [c1]Wei Zhang, Qi Chen, Ming Xia
, Rui Ma, Fei Lu, Chenkun Wang, Albert Z. Wang, Ya-Hong Xie:
TLP evaluation of ESD protection capability of graphene micro-ribbons for ICs. ASICON 2015: 1-4
Coauthor Index
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