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ORCIDRobert S. Schreiber
Person information
- affiliation: Cerebras Systems, USA
- affiliation (former): Hewlett-Packard Labs
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Journal Articles
- 2012
[j5]Jung Ho Ahn
, Norman P. Jouppi, Christos Kozyrakis, Jacob Leverich, Robert S. Schreiber:
Improving System Energy Efficiency with Memory Rank Subsetting. ACM Trans. Archit. Code Optim. 9(1): 4:1-4:28 (2012)- [j4]Pramod G. Joisha, Robert S. Schreiber, Prithviraj Banerjee, Hans-Juergen Boehm, Dhruva R. Chakrabarti:
On a Technique for Transparently Empowering Classical Compiler Optimizations on Multithreaded Code. ACM Trans. Program. Lang. Syst. 34(2): 9:1-9:42 (2012) - 2009
- [j3]Jung Ho Ahn, Jacob Leverich, Robert S. Schreiber, Norman P. Jouppi:
Multicore DIMM: an Energy Efficient Memory Module with Independently Controlled DRAMs. IEEE Comput. Archit. Lett. 8(1): 5-8 (2009) - 1995
- [j2]James Weldon Demmel, Nicholas J. Higham, Robert S. Schreiber:
Stability of block LU factorization. Numer. Linear Algebra Appl. 2(2): 173-190 (1995) - 1990
- [j1]Nicholas J. Higham, Robert S. Schreiber:
Fast Polar Decomposition of an Arbitrary Matrix. SIAM J. Sci. Comput. 11(4): 648-655 (1990)
Conference and Workshop Papers
- 2013
- [c10]Shivaram Venkataraman, Erik Bodzsar, Indrajit Roy, Alvin AuYoung, Robert S. Schreiber:
Presto: distributed machine learning and graph processing with sparse matrices. EuroSys 2013: 197-210 - [c9]Doe Hyun Yoon, Jichuan Chang, Robert S. Schreiber, Norman P. Jouppi:
Practical nonvolatile multilevel-cell phase change memory. SC 2013: 21:1-21:12 - 2012
- [c8]Doe Hyun Yoon, Tobin Gonzalez, Parthasarathy Ranganathan, Robert S. Schreiber:
Exploring latency-power tradeoffs in deep nonvolatile memory hierarchies. Conf. Computing Frontiers 2012: 95-102 - [c7]Shivaram Venkataraman, Indrajit Roy, Alvin AuYoung, Robert S. Schreiber:
Using R for Iterative and Incremental Processing. HotCloud 2012 - 2011
- [c6]Dhruva R. Chakrabarti, Prithviraj Banerjee, Hans-Juergen Boehm, Pramod G. Joisha, Robert S. Schreiber:
The runtime abort graph and its application to software transactional memory optimization. CGO 2011: 42-53 - [c5]Pramod G. Joisha, Robert S. Schreiber, Prithviraj Banerjee, Hans-Juergen Boehm, Dhruva R. Chakrabarti:
A technique for the effective and automatic reuse of classical compiler optimizations on multithreaded code. POPL 2011: 623-636 - 2009
- [c4]Jung Ho Ahn, Nathan L. Binkert, Al Davis, Moray McLaren, Robert S. Schreiber:
HyperX: topology, routing, and packaging of efficient large-scale networks. SC 2009 - [c3]Jung Ho Ahn, Norman P. Jouppi, Christos Kozyrakis, Jacob Leverich, Robert S. Schreiber:
Future scaling of processor-memory interfaces. SC 2009 - 2008
- [c2]Raymond G. Beausoleil, Jung Ho Ahn, Nathan L. Binkert, Al Davis, David Fattal, Marco Fiorentino, Norman P. Jouppi, Moray McLaren, Charles M. Santori, Robert S. Schreiber, S. M. Spillane, Dana Vantrease, Qianfan Xu:
A Nanophotonic Interconnect for High-Performance Many-Core Computation. Hot Interconnects 2008: 182-189 - 1997
- [c1]Scott B. Baden, Robert S. Schreiber, Kang Su Gatlin, Stephen J. Fink:
A Preliminary Evaluation of HPF. PPSC 1997
Editorship
- 1995
- [e1]David H. Bailey, Petter E. Bjørstad, John R. Gilbert, Michael Mascagni, Robert S. Schreiber, Horst D. Simon, Virginia Torczon, Layne T. Watson:
Proceedings of the Seventh SIAM Conference on Parallel Processing for Scientific Computing, PPSC 1995, San Francisco, California, USA, February 15-17, 1995. SIAM 1995, ISBN 0-89871-344-7 [contents]
Coauthor Index
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