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ORCIDGiovanni Causapruno
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2010 – 2019
- 2019
[j5]Mario Cofano, Marco Vacca, Giulia Santoro, Giovanni Causapruno, Giovanna Turvani
, Mariagrazia Graziano:
Exploiting the Logic-In-Memory paradigm for speeding-up data-intensive algorithms. Integr. 66: 153-163 (2019)- 2018
- [j4]Davide Giri, Giovanni Causapruno, Fabrizio Riente:
Parallel and Serial Computation in Nanomagnet Logic: An Overview. IEEE Trans. Very Large Scale Integr. Syst. 26(8): 1427-1437 (2018) - 2016
- [b1]Giovanni Causapruno:
Architectural Solutions for NanoMagnet Logic. Polytechnic University of Turin, Italy, 2016 - [j3]Giovanni Causapruno, Fabrizio Riente, Giovanna Turvani, Marco Vacca, Massimo Ruo Roch, Maurizio Zamboni, Mariagrazia Graziano:
Reconfigurable Systolic Array: From Architecture to Physical Design for NML. IEEE Trans. Very Large Scale Integr. Syst. 24(11): 3208-3217 (2016) - [c6]Giovanni Causapruno, Umberto Garlando, Fabrizio Cairo, Maurizio Zamboni, Mariagrazia Graziano:
A Reconfigurable Array Architecture for NML. ISVLSI 2016: 99-104 - 2015
- [j2]Giovanni Causapruno, Marco Vacca, Mariagrazia Graziano, Maurizio Zamboni:
Interleaving in Systolic-Arrays: A Throughput Breakthrough. IEEE Trans. Computers 64(7): 1940-1953 (2015) - [j1]Giovanni Causapruno, Gianvito Urgese, Marco Vacca, Mariagrazia Graziano, Maurizio Zamboni:
Protein Alignment Systolic Array Throughput Optimization. IEEE Trans. Very Large Scale Integr. Syst. 23(1): 68-77 (2015) - [c5]D. Pala, Giovanni Causapruno, Marco Vacca, Fabrizio Riente, Giovanna Turvani, Mariagrazia Graziano, Maurizio Zamboni:
Logic-in-Memory architecture made real. ISCAS 2015: 1542-1545 - [c4]Mario Cofano, Giulia Santoro, Marco Vacca, D. Pala, Giovanni Causapruno, Fabrizio Cairo, Fabrizio Riente, Giovanna Turvani, Massimo Ruo Roch, Mariagrazia Graziano, Maurizio Zamboni:
Logic-in-Memory: A Nano Magnet Logic Implementation. ISVLSI 2015: 286-291 - 2014
- [c3]Guoping Xiao, Waqar Ahmad, Syed Azhar Ali Zaidi, Massimo Ruo Roch, Giovanni Causapruno:
High Speed VLSI Architecture for Finding the First W Maximum/Minimum Values. ApplePies 2014: 35-41 - [c2]Giovanni Causapruno, A. Audero, Sergio Tota, Massimo Ruo Roch:
A Framework for Network-On-Chip Comparison Based on OpenSPARC T2 Processor. ApplePies 2014: 99-105 - [c1]Davide Giri, Marco Vacca, Giovanni Causapruno, Wenjing Rao, Mariagrazia Graziano, Maurizio Zamboni:
A standard cell approach for MagnetoElastic NML circuits. NANOARCH 2014: 65-70 - [p1]Marco Vacca, Mariagrazia Graziano, Juanchi Wang, Fabrizio Cairo, Giovanni Causapruno, Gianvito Urgese, Andrea Biroli, Maurizio Zamboni:
NanoMagnet Logic: An Architectural Level Overview. Field-Coupled Nanocomputing 2014: 223-256
Coauthor Index
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