![](https://dblp.uni-trier.de/img/logo.ua.320x120.png)
![](https://dblp.uni-trier.de/img/dropdown.dark.16x16.png)
![](https://dblp.uni-trier.de/img/peace.dark.16x16.png)
Остановите войну!
for scientists:
![search dblp search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
![search dblp](https://dblp.uni-trier.de/img/search.dark.16x16.png)
default search action
Heein Yoon
Person information
Refine list
![note](https://dblp.uni-trier.de/img/note-mark.dark.12x12.png)
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
Journal Articles
- 2019
- [j5]Heein Yoon
, Suneui Park, Jaehyouk Choi
:
A Low-Jitter Injection-Locked Multi-Frequency Generator Using Digitally Controlled Oscillators and Time-Interleaved Calibration. IEEE J. Solid State Circuits 54(6): 1564-1574 (2019) - [j4]Juyeop Kim
, Younghyun Lim
, Heein Yoon
, Yongsun Lee
, Hangi Park
, Yoonseo Cho
, Taeho Seong
, Jaehyouk Choi
:
An Ultra-Low-Jitter, mmW-Band Frequency Synthesizer Based on Digital Subsampling PLL Using Optimally Spaced Voltage Comparators. IEEE J. Solid State Circuits 54(12): 3466-3477 (2019) - 2018
- [j3]Seyeon Yoo
, Seojin Choi, Juyeop Kim
, Heein Yoon
, Yongsun Lee
, Jaehyouk Choi
:
A Low-Integrated-Phase-Noise 27-30-GHz Injection-Locked Frequency Multiplier With an Ultra-Low-Power Frequency-Tracking Loop for mm-Wave-Band 5G Transceivers. IEEE J. Solid State Circuits 53(2): 375-388 (2018) - 2016
- [j2]Heein Yoon
, Yongsun Lee, Younghyun Lim
, Geum-Young Tak, Hong-Teuk Kim, Yo-Chuol Ho, Jaehyouk Choi
:
A 0.56-2.92 GHz Wideband and Low Phase Noise Quadrature LO-Generator Using a Single LC-VCO for 2G-4G Multistandard Cellular Transceivers. IEEE J. Solid State Circuits 51(3): 614-625 (2016) - 2014
- [j1]Heein Yoon
, Yongsun Lee, Jae Joon Kim
, Jaehyouk Choi
:
A Wideband Dual-Mode LC-VCO With a Switchable Gate-Biased Active Core. IEEE Trans. Circuits Syst. II Express Briefs 61-II(5): 289-293 (2014)
Conference and Workshop Papers
- 2021
- [c8]Seyeon Yoo, Suneui Park, Seojin Choi, Yoonseo Cho, Heein Yoon, Chanwoong Hwang, Jaehyouk Choi:
An 82fsrms-Jitter and 22.5mW-Power, 102GHz W-Band PLL Using a Power-Gating Injection-Locked Frequency-Multiplier- Based Phase Detector in 65nm CMOS. ISSCC 2021: 330-332 - 2020
- [c7]Younghyun Lim
, Juyeop Kim
, Yongwoo Jo
, Jooeun Bang
, Seyeon Yoo, Hangi Park, Heein Yoon, Jaehyouk Choi:
17.8 A 170MHz-Lock-In-Range and -253dB-FoMjitter 12-to-14.5GHz Subsampling PLL with a 150µW Frequency-Disturbance-Correcting Loop Using a Low-Power Unevenly Spaced Edge Generator. ISSCC 2020: 280-282 - 2019
- [c6]Juyeop Kim
, Heein Yoon, Younghyun Lim
, Yongsun Lee, Yoonseo Cho, Taeho Seong, Jaehyouk Choi:
A 76fsrms Jitter and -40dBc Integrated-Phase-Noise 28-to-31GHz Frequency Synthesizer Based on Digital Sub-Sampling PLL Using Optimally Spaced Voltage Comparators and Background Loop-Gain Optimization. ISSCC 2019: 258-260 - 2018
- [c5]Seyeon Yoo, Seojin Choi
, Juyeop Kim
, Heein Yoon
, Yongsun Lee, Jaehyouk Choi
:
Injection-locked frequency multiplier with a continuous frequency-tracking loop for 5G transceivers. ASP-DAC 2018: 303-304 - [c4]Heein Yoon, Juyeop Kim
, Suneui Park, Younghyun Lim
, Yongsun Lee, Jooeun Bang
, Kyoohyun Lim, Jaehyouk Choi
:
A -31dBc integrated-phase-noise 29GHz fractional-N frequency synthesizer supporting multiple frequency bands for backward-compatible 5G using a frequency doubler and injection-locked frequency multipliers. ISSCC 2018: 366-368 - 2017
- [c3]Suneui Park, Heein Yoon
, Jaehyouk Choi
:
An ultra-low phase noise all-digital multi-frequency generator using injection-locked DCOs and time-interleaved calibration. A-SSCC 2017: 329-332 - [c2]Seyeon Yoo, Seojin Choi
, Juyeop Kim
, Heein Yoon, Yongsun Lee, Jaehyouk Choi
:
19.2 A PVT-robust -39dBc 1kHz-to-100MHz integrated-phase-noise 29GHz injection-locked frequency multiplier with a 600µW frequency-tracking loop using the averages of phase deviations for mm-band 5G transceivers. ISSCC 2017: 324-325 - 2016
- [c1]Yongsun Lee, Heein Yoon, Mina Kim, Jaehyouk Choi
:
A PVT-robust -59-dBc reference spur and 450-fsRMS jitter injection-locked clock multiplier using a voltage-domain period-calibrating loop. VLSI Circuits 2016: 1-2
Coauthor Index
![](https://dblp.uni-trier.de/img/cog.dark.24x24.png)
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from ,
, and
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and
to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from .
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-04-24 22:49 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint