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Journal Articles
- 2024
[j11]David C. C. Freitas
, David F. M. Mota, David Coelho, Humberto Fontinele, Alexandre Coelho, Jarbas Silveira, Lirida Naviner, João Mota, César A. M. Marcon:
Check-Bit Region Exploration in Two-Dimensional Error Correction Codes. IEEE Access 12: 131830-131841 (2024)- 2023
- [j10]Felipe G. A. e Silva, Alan Cadore Pinheiro, Jarbas A. N. Silveira, César A. M. Marcon:
A Triple Burst Error Correction Based on Region Selection Code. IEEE Trans. Very Large Scale Integr. Syst. 31(8): 1214-1222 (2023) - 2022
- [j9]Felipe G. A. e Silva, Adahil Muniz, Marco P. Stefani, Jarbas Silveira, César A. M. Marcon:
Expanding Column Line Code Adaptive (CLC-A) for Protecting 32-and 64-Bit Data. IEEE Des. Test 39(2): 15-22 (2022) - [j8]David C. C. Freitas, Jarbas Silveira, César A. M. Marcon, Lirida A. B. Naviner, João Cesar M. Mota:
OPCoSA: an Optimized Product Code for space applications. Integr. 84: 131-141 (2022) - 2021
- [j7]David C. C. Freitas, David F. M. Mota, César A. M. Marcon, Jarbas A. N. Silveira, João Cesar M. Mota:
LPC: An Error Correction Code for Mitigating Faults in 3D Memories. IEEE Trans. Computers 70(11): 2001-2012 (2021) - [j6]Rodrigo Cataldo, Ramon Fernandes, Kevin J. M. Martin, Jarbas Silveira, Gustavo Sanchez, Johanna Sepúlveda, César A. M. Marcon, Jean-Philippe Diguet:
Subutai: Speeding Up Legacy Parallel Applications Through Data Synchronization. IEEE Trans. Parallel Distributed Syst. 32(5): 1102-1116 (2021) - 2020
- [j5]David C. C. Freitas, David F. M. Mota, Roger C. Goerl, César A. M. Marcon, Fabian Vargas, Jarbas A. N. Silveira, João Cesar M. Mota:
PCoSA: A product error correction code for use in memory devices targeting space applications. Integr. 74: 71-80 (2020) - [j4]Alan Cadore Pinheiro, Daniel A. B. Tavares, Felipe G. A. e Silva, Jarbas Silveira, César A. M. Marcon:
Optimized buffer protection for network-on-chip based on Error Correction Code. Microelectron. J. 100: 104799 (2020) - 2019
- [j3]Gustavo Sanchez, Jarbas Silveira, Luciano Volcan Agostini, César A. M. Marcon:
Performance Analysis of Depth Intra-Coding in 3D-HEVC. IEEE Trans. Circuits Syst. Video Technol. 29(8): 2509-2520 (2019) - 2018
- [j2]Felipe G. A. e Silva, Jardel Silveira, Jarbas Silveira, César A. M. Marcon, Fabian Vargas, Otávio Alcântara de Lima Jr.:
An Extensible Code for Correcting Multiple Cell Upset in Memory Arrays. J. Electron. Test. 34(4): 417-433 (2018) - 2016
- [j1]Jarbas Silveira, César A. M. Marcon, Paulo Cortez, Giovanni Cordeiro Barroso, Joao Marcelo Ferreira, Rafael Mota:
Scenario preprocessing approach for the reconfiguration of fault-tolerant NoC-based MPSoCs. Microprocess. Microsystems 40: 137-153 (2016)
Conference and Workshop Papers
- 2023
- [c21]Edilson Filho, Jarbas Silveira, César A. M. Marcon:
Blockchain Applied In Decentralization of Ground Stations To Educational Nanosatellites. LATS 2023: 1-5 - [c20]Marco P. Stefani, César A. M. Marcon, Felipe G. A. e Silva, Jarbas Silveira:
Memory Controller with Adaptive ECC for Reliable System Operation. SBCCI 2023: 1-6 - 2022
- [c19]Jorge Reis, Jarbas Silveira, César A. M. Marcon:
Impact of failures in a MPSoC with shared coprocessors to extend the RISC-V ISA. LADC 2022: 29-34 - 2020
- [c18]David C. C. Freitas, David F. M. Mota, Daniel Simões, Clailton Lopes, Roger C. Goerl, César Augusto Missio Marcon, Jarbas A. N. Silveira, João Cesar M. Mota:
Error Coverage, Reliability and Cost Analysis of Fault Tolerance Techniques for 32-bit Memories used on Space Missions. ISQED 2020: 250-254 - [c17]Moabe F. Domingos, George H. Castro, Jarbas Silveira, Felipe G. A. e Silva, M. K. D. Pereira, Pedro Lima:
MMS: A Software for Error Monitoring in Memories Protected by ECC. LATS 2020: 1-6 - [c16]Pedro Lima, Caio Vieira, Jorge Reis, Alexandre Almeida, Jarbas Silveira, Roger C. Goerl, César A. M. Marcon:
Optimizing RISC-V ISA Usage by Sharing Coprocessors on MPSoC. LATS 2020: 1-5 - [c15]Felipe G. A. e Silva, Adahil Muniz, Jarbas Silveira, César A. M. Marcon:
CLC-A: An Adaptive Implementation of the Column Line Code (CLC) ECC. SBCCI 2020: 1-6 - 2019
- [c14]Alan Cadore Pinheiro, Jarbas A. N. Silveira, Daniel A. B. Tavares, Felipe G. A. e Silva, César A. M. Marcon:
Optimized Fault-Tolerant Buffer Design for Network-on-Chip Applications. LASCAS 2019: 217-220 - [c13]Philippe de S. Magalhães, Otávio Alcântara de Lime Jr., Jarbas Silveira:
PHICC: an error correction code for memory devices. SBCCI 2019: 1 - 2017
- [c12]Felipe G. A. e Silva, Walter Magalhaes, Jarbas Silveira, Joao Marcelo Ferreira, Philippe de S. Magalhães, Otávio A. de Lima, César A. M. Marcon:
Evaluation of multiple bit upset tolerant codes for NoCs buffering. LASCAS 2017: 1-4 - [c11]Ronaldo Milfont, Paulo Cortez, Alan Cadore Pinheiro, Joao Marcelo Ferreira, Jarbas Silveira, Rafael Mota, César A. M. Marcon:
Analysis of routing algorithms generation for irregular NoC topologies. LATS 2017: 1-5 - [c10]Ronaldo T. P. Milfont, Rafael Goncalves Mota, João Marcelo Ferreira, Paulo César Cortez, César A. M. Marcon, Daniel A. B. Tavares, Jarbas A. N. Silveira:
Latency reduction of fault-tolerant NoCs by employing multiple paths. SBCCI 2017: 72-78 - [c9]Felipe G. A. e Silva, Otávio A. de Lima, Walter da C. Freitas, Fabian Vargas, Jarbas Silveira, César A. M. Marcon:
An efficient, low-cost ECC approach for critical-application memories. SBCCI 2017: 198-203 - 2016
- [c8]Rafael Goncalves Mota, Jarbas Silveira, Jardel Silveira, Lucas Brahm, Avelino F. Zorzo, Filipo Novo Mor, César A. M. Marcon:
Efficient routing table minimization for fault-tolerant irregular Network-on-Chip. ICECS 2016: 632-635 - [c7]Joao Marcelo Ferreira, Jarbas Silveira, Jardel Silveira, Rodrigo Cataldo, Thais Webber, Fernando Gehm Moraes, César A. M. Marcon:
Efficient traffic balancing for NoC routing latency minimization. ISCAS 2016: 2599-2602 - [c6]Helano de S. Castro, Jarbas A. N. da Silveira, Alexandre A. P. Coelho, Felipe G. A. e Silva, Philippe de S. Magalhães, Otávio A. de Lima:
A correction code for multiple cells upsets in memory devices for space applications. NEWCAS 2016: 1-4 - [c5]Ramon Fernandes, César A. M. Marcon, Rodrigo Cataldo, Jarbas Silveira, Georg Sigl, Martha Johanna Sepúlveda:
A security aware routing approach for NoC-based MPSoCs. SBCCI 2016: 1-6 - 2015
- [c4]Jarbas Silveira, Mathieu Bodin, Joao Marcelo Ferreira, Alan Cadore Pinheiro, Thais Webber, César A. M. Marcon:
A fault prediction module for a fault tolerant NoC operation. ISQED 2015: 284-288 - [c3]Jarbas Silveira, César A. M. Marcon, Paulo Cortez, Giovanni Cordeiro Barroso, Joao Marcelo Ferreira, Rafael Mota:
Preprocessing of Scenarios for Fast and Efficient Routing Reconfiguration in Fault-Tolerant NoCs. PDP 2015: 404-411 - [c2]Jarbas Silveira, Paulo Cortez, Alan Cadore Pinheiro, Rafael Mota, César A. M. Marcon, Lucas Brahm, Ramon Fernandes:
Smart Reconfiguration Approach for Fault-Tolerant NoC Based MPSoCs. SBCCI 2015: 27:1-27:6 - 2014
- [c1]Jarbas Silveira, Paulo César Cortez, Giovanni Cordeiro Barroso, César A. M. Marcon:
Employing a Timed Colored Petri Net to accomplish an accurate model for Network-on-Chip performance evaluation. ISQED 2014: 55-59
Editorship
- 2017
- [e1]Jarbas A. N. Silveira:
Proceedings of the 30th Symposium on Integrated Circuits and Systems Design: Chip on the Sands, SBCCI 2017, Fortaleza, Ceará, Brazil, August 28 - September 01, 2017. ACM 2017, ISBN 978-1-4503-5106-5 [contents]
Informal and Other Publications
- 2023
- [i1]David C. C. Freitas, David F. M. Mota, Clailton Lopes, Daniel Simões, Jarbas Silveira, João Cesar M. Mota, César A. M. Marcon:
Exploration and Analysis of Combinations of Hamming Codes in 32-bit Memories. CoRR abs/2306.16259 (2023)
Coauthor Index
aka: César Augusto Missio Marcon
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