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ORCIDBasireddy Karunakar Reddy
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2020 – today
- 2020
[j11]Amit Kumar Singh
, Somdip Dey, Klaus D. McDonald-Maier, Basireddy Karunakar Reddy, Geoff V. Merrett, Bashir M. Al-Hashimi:
Dynamic Energy and Thermal Management of Multi-core Mobile Platforms: A Survey. IEEE Des. Test 37(5): 25-33 (2020)- [j10]Amit Kumar Singh, Basireddy Karunakar Reddy, Alok Prakash, Geoff V. Merrett, Bashir M. Al-Hashimi:
Collaborative Adaptation for Energy-Efficient Heterogeneous Mobile SoCs. IEEE Trans. Computers 69(2): 185-197 (2020) - [j9]Basireddy Karunakar Reddy, Amit Kumar Singh, Bashir M. Al-Hashimi, Geoff V. Merrett:
AdaMD: Adaptive Mapping and DVFS for Energy-Efficient Heterogeneous Multicores. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(10): 2206-2217 (2020)
2010 – 2019
- 2019
- [j8]Eduardo Weber Wächter, Cedric de Bellefroid, Basireddy Karunakar Reddy, Amit Kumar Singh, Bashir M. Al-Hashimi, Geoff V. Merrett:
Predictive Thermal Management for Energy-Efficient Execution of Concurrent Applications on Heterogeneous Multicores. IEEE Trans. Very Large Scale Integr. Syst. 27(6): 1404-1415 (2019) - [c10]Somdip Dey, Enrique Zaragoza Guajardo, Basireddy Karunakar Reddy, Xiaohang Wang, Amit Kumar Singh, Klaus D. McDonald-Maier:
EdgeCoolingMode: An Agent Based Thermal Management Mechanism for DVFS Enabled Heterogeneous MPSoCs. VLSID 2019: 19-24 - 2018
- [j7]Srinivas Sabbavarapu, Basireddy Karunakar Reddy, Amit Acharyya:
Novel ASIC Design Flow Using Dynamic Libraries for Reducing Design Time. J. Low Power Electron. 14(2): 337-350 (2018) - [j6]Basireddy Karunakar Reddy, Srinivas Sabbavarapu, Amit Acharyya:
Cut-less Technology Mapping Using Shannon Factor Graph with on-the-fly Size Reduction. J. Low Power Electron. 14(3): 448-457 (2018) - [j5]Basireddy Karunakar Reddy, Amit Kumar Singh, Dwaipayan Biswas, Geoff V. Merrett, Bashir M. Al-Hashimi:
Inter-Cluster Thread-to-Core Mapping and DVFS on Heterogeneous Multi-Cores. IEEE Trans. Multi Scale Comput. Syst. 4(3): 369-382 (2018) - [c9]Basireddy Karunakar Reddy, Geoff V. Merrett, Bashir M. Al-Hashimi, Amit Kumar Singh:
Online concurrent workload classification for multi-core energy management. DATE 2018: 621-624 - [c8]Basireddy Karunakar Reddy, Eduardo Weber Wächter, Bashir M. Al-Hashimi, Geoff V. Merrett:
Workload-Aware Runtime Energy Management for HPC Systems. HPCS 2018: 292-299 - 2017
- [j4]Amit Kumar Singh, Charles Leech, Basireddy Karunakar Reddy, Bashir M. Al-Hashimi, Geoff V. Merrett:
Learning-Based Run-Time Power and Energy Management of Multi/Many-Core Systems: Current and Future Trends. J. Low Power Electron. 13(3): 310-325 (2017) - [j3]Srinivas Sabbavarapu, Basireddy Karunakar Reddy, Amit Acharyya, S. Saqib Khursheed:
Improved Wire Length-Driven Placement Technique for Minimizing Wire Length, Area and Timing. J. Low Power Electron. 13(3): 456-471 (2017) - [j2]Amit Kumar Singh, Alok Prakash, Basireddy Karunakar Reddy, Geoff V. Merrett, Bashir M. Al-Hashimi:
Energy-Efficient Run-Time Mapping and Thread Partitioning of Concurrent OpenCL Applications on CPU-GPU MPSoCs. ACM Trans. Embed. Comput. Syst. 16(5s): 147:1-147:22 (2017) - [c7]Basireddy Karunakar Reddy, Matthew J. Walker, Domenico Balsamo, Stephan Diestelhorst, Bashir M. Al-Hashimi, Geoff V. Merrett:
Empirical CPU power modelling and estimation in the gem5 simulator. PATMOS 2017: 1-8 - 2014
- [j1]Srinivas Sabbavarapu, Basireddy Karunakar Reddy, N. Srinivasulu, Amit Acharyya, Jimson Mathew:
A Novel Integrated Circuit Design Methodology Using Dynamic Library Concept with Reduced Non-Recurring Engineering Cost and Time-to-Market. J. Low Power Electron. 10(3): 429-442 (2014) - [c6]Basireddy Karunakar Reddy, Srinivas Sabbavarapu, Amit Acharyya:
A new VLSI IC design automation methodology with reduced NRE costs and time-to-market using the NPN class Representation and functional symmetry. ISCAS 2014: 177-180 - [c5]Srinivas Sabbavarapu, Basireddy Karunakar Reddy, Amit Acharyya:
A New Dynamic Library Based IC Design Automation Methodology Using Functional Symmetry with NPN Class Representation Approach to Reduce NRE Costs and Time-to-Market. ISED 2014: 115-119 - [c4]Basireddy Karunakar Reddy, Srinivas Sabbavarapu, Amit Acharyya:
Effect of Constant One and Zero, Shared and Non-decomposed Nodes on Runtime and Graph Size of the Shannon Factor Graph (SFG). ISED 2014: 135-139 - [c3]Pramod Kaddi, Basireddy Karunakar Reddy, Shiv Govind Singh:
Active Cooling Technique for Efficient Heat Mitigation in 3D-ICs. VLSID 2014: 495-498 - 2013
- [c2]Basireddy Karunakar Reddy, Srinivas Sabbavarapu, Kshitiz Gupta, Rayapati Prabhat, Amit Acharyya, Rishad A. Shafik, Jimson Mathew:
A Novel and Unified Digital IC Design and Automation Methodology with Reduced NRE Cost and Time-to-Market. ISED 2013: 36-40 - [c1]Srinivas Sabbavarapu, Basireddy Karunakar Reddy, Rayapati Prabhat, Kshitiz Gupta, Amit Acharyya, Rishad Ahmed Shafik, Jimson Mathew:
A Novel Physical Synthesis Methodology in the VLSI Design Automation by Introducing Dynamic Library Concept. ISED 2013: 103-107
Coauthor Index
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