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ORCIDDietmar Sträußnigg
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2020 – today
- 2024
[c13]Jose Luis Ceballos, Fulvio Ciciotti, Christopher Rogi, Alessandro Caspani, Luca Sant, Dietmar Straeussnigg, Andreas Wiesbauer, Simon Gruenberger, Chin Yeong Koh, Chern Sia Phillip Lim:
A 70dBA-460μW Companding Digital Silicon Microphone with Programmable Acoustic Overload Point and MEMS Asymmetry Robustness. ISCAS 2024: 1-5- [c12]Yukai Shen, Carlos Perez, Dietmar Straeussnigg, Eric Gutierrez:
Time-Encoded Mostly Digital Feature Extraction for Voice Activity Detection Tasks. ISCAS 2024: 1-5 - 2023
- [c11]Yukai Shen, Dietmar Straeussnigg, Eric Gutierrez:
Towards Ultra-Low Power Consumption VAD Architectures with Mixed Signal Circuits. ISCAS 2023: 1-5 - 2022
- [c10]Jose Luis Ceballos, Christopher Rogi, Fulvio Ciciotti, Cesare Buffa, Dietmar Straeussnigg, Andreas Wiesbauer:
A 69dBA-730µW Silicon Microphone System with Ultra & Infra-Sound Robustness. ESSCIRC 2022: 409-412 - [c9]Pablo Vera, Dietmar Straeussnigg, Victor Medina, Luis Hernández, Susana Patón
:
Optimal reconfiguration instant in ΣΔ Modulators. ISCAS 2022: 1225-1229
2010 – 2019
- 2019
- [c8]Pablo Vera, Susana Patón, Dietmar Straeussnigg:
Idle Tones Reduction in Digital Single-Bit ΣΔ Modulators. ISCAS 2019: 1-5 - 2017
- [c7]Elmar Bach, Richard Gaggl, Luca Sant, Cesare Buffa, Snezana Stojanovic, Dietmar Straeussnigg, Andreas Wiesbauer:
9.5 A 1.8V true-differential 140dB SPL full-scale standard CMOS MEMS digital microphone exhibiting 67dB SNR. ISSCC 2017: 166-167 - 2016
- [c6]Laura Conesa-Peraleja, Susana Patón, Dietmar Straeussnigg, Andreas Wiesbauer:
Signal boosting to extend the bandwidth of oversampled converters. ICECS 2016: 600-603 - 2015
- [c5]Fernando Cardes, Ruzica Jevtic, Luis Hernández, Andreas Wiesbauer, Dietmar Sträußnigg, Richard Gaggl:
A MEMS microphone interface based on a CMOS LC oscillator and a digital sigma-delta modulator. ISCAS 2015: 2233-2236 - [c4]Juan A. Torreño, Susana Patón, Laura Conesa-Peraleja, Luis Hernández, Dietmar Straeussnigg:
A noise coupled ΣΔ architecture using a Non Uniform Quantizer. NORCAS 2015: 1-4 - 2014
- [c3]Fernando Cardes, Luis Hernández, Javier Escobar, Andreas Wiesbauer, Dietmar Straeussnigg, Richard Gaggl:
A time-encoding CMOS capacitive sensor readout circuit with flicker noise reduction. MWSCAS 2014: 390-393 - 2010
- [j2]Robert Priewasser, Matteo Agostinelli, Stefano Marsili, Dietmar Sträußnigg, Mario Huemer:
Comparative study of linear and non-linear integrated control schemes applied to a Buck converter for mobile applications. Elektrotech. Informationstechnik 127(4): 103-108 (2010)
2000 – 2009
- 2006
- [c2]David Schwingshackl, Dietmar Straeussnigg:
Correlated discrete disturbers cancelation in data communication systems. EUSIPCO 2006: 1-4 - [c1]Andreas Wiesbauer, Dietmar Sträußnigg, Richard Gaggl, Martin Clara, Luis Hernández, Daniel Gruber:
Clock jitter compensation for current steering DACs. ISCAS 2006 - 2002
- [j1]Hubert Weinberger, Andreas Wiesbauer, Christian Fleischhacker, Joerg Hauptmann, Thomas Ferianz, Michael Staber, Dietmar Sträußnigg, Berthold Seger:
An ADSL-RT full-rate analog front end IC with integrated line driver. IEEE J. Solid State Circuits 37(7): 857-865 (2002)
Coauthor Index
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last updated on 2024-10-07 22:22 CEST by the dblp team
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