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T. Ananthan

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Journal Articles

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2019
[j4]
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T. Ananthan:
A FPGA-based state space controller. Int. J. Autom. Control. 13(1): 84-100 (2019)
2014
[j3]
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T. Ananthan, M. V. Vaidyan:
An FPGA-based parallel architecture for on-line parameter estimation using the RLS identification algorithm. Microprocess. Microsystems 38(5): 496-508 (2014)
2013
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T. Ananthan, M. V. Vaidyan:
FPGA-based parallel architecture for PID control algorithm and HDL co-simulation. Int. J. Embed. Syst. 5(4): 239-247 (2013)
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T. Ananthan, M. V. Vaidyan:
A Reconfigurable Parallel Hardware Implementation of the Self-Tuning Regulator. ACM Trans. Reconfigurable Technol. Syst. 6(4): 17:1-17:21 (2013)

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