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Subramania Sudharsanan
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2000 – 2009
- 2009
- [j2]Stephen Warrington, Wai-Yip Chan, Subramania Sudharsanan:
Scalable high-throughput variable block size motion estimation architecture. Microprocess. Microsystems 33(4): 319-325 (2009) - [c9]Jonathan Roth, Naraig Manjikian, Subramania Sudharsanan:
Performance optimization and parallelization of turbo decoding for software-defined radio. CCECE 2009: 804-809 - 2007
- [c8]Stephen Warrington, Subramania Sudharsanan, Wai-Yip Chan:
Architecture for Multiple Reference Frame Variable Block Size Motion Estimation. ISCAS 2007: 2894-2897 - 2006
- [c7]Mohanarajah Sinnathamby, Subramania Sudharsanan, Naraig Manjikian:
Enhanced Architectural Support for Variable-Length Decoding. ICME 2006: 2045-2048 - [c6]Stephen Warrington, Wai-Yip Chan, Subramania Sudharsanan:
Scalable high-throughput architecture for H.264/AVC variable block size motion estimation. ISCAS 2006 - [c5]Stephen Warrington, Hassan Shojania, Subramania Sudharsanan, Wai-Yip Chan:
Performance improvement of the H.264/AVC deblocking filter using SIMD instructions. ISCAS 2006 - 2005
- [j1]Subramania Sudharsanan:
Shared key encryption of JPEG color images. IEEE Trans. Consumer Electron. 51(4): 1204-1211 (2005) - 2004
- [c4]Odej Kao, Harald Kosch, Subramania Sudharsanan, Andreas Uhl:
Topic 12: High Performance Multimedia. Euro-Par 2004: 751 - 2000
- [c3]Subramania Sudharsanan, Parthasarathy Sriram:
Block-Based Adaptive Lossless Image Coder. ICIP 2000: 120-123 - [c2]Subramania Sudharsanan, Parthasarathy Sriram, Hans Frederickson, Amit Gulati:
Image and Video Processing Using MAJC 5200. ICIP 2000: 122-125 - [c1]Subramania Sudharsanan:
MAJC-5200: A High Performance Microprocessor for Multimedia Computing. IPDPS Workshops 2000: 163-170
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