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ORCIDNobuyuki Nishiguchi
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2010 – 2019
- 2011
[c6]Nobuyuki Nishiguchi:
An RTL-to-GDS2 design methodology for advanced system LSI. ASP-DAC 2011: 770-774
2000 – 2009
- 2008
- [c5]Sungdae Choi, Katsuyuki Ikeuchi, Hyunkyung Kim, Kenichi Inagaki, Masami Murakata, Nobuyuki Nishiguchi, Makoto Takamiya, Takayasu Sakurai:
Experimental assessment of logic circuit performance variability with regular fabrics at 90nm technology node. ESSCIRC 2008: 50-53 - 2005
- [c4]Nobuyuki Nishiguchi:
An advance RTL to GDS2 design methodology for 90 nm and below system LSIs to solve timing closure, signal integrity and design for manufacturing. ISCAS (6) 2005: 5938-5941
1990 – 1999
- 1992
- [c3]Takashi Shimamoto, Hidetaka Hane, Isao Shirakawa, Shuji Tsukiyama, Shoji Shinoda, Nobuyasu Yui, Nobuyuki Nishiguchi:
A distributed routing system for multilayer SOG. EURO-DAC 1992: 298-303 - 1991
- [c2]Tsukasa Yamauchi, Akio Ishizuka, Toshiyuki Nakata, Nobuyuki Nishiguchi, Nobuhiko Koike:
PROTON: A Parallel Detailed Router on an MIMD Parallel Machine. ICCAD 1991: 340-343 - 1990
- [c1]Noritake Yonezawa, Nobuyuki Nishiguchi, Atsushi Etani, Fumiaki Tsukuda, Ryuichi Hashishita:
A VLSI floorplanner based on "balloon" expansion. EURO-DAC 1990: 257-261
1980 – 1989
- 1987
- [j1]Atsushi Kurosawa, Kazutaka Yamada, Aritoyo Kishimoto, Kunio Mori, Nobuyuki Nishiguchi:
A Practical CAD System Application for Full Custom VLSI Microcomputer Chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6(3): 364-373 (1987)
Coauthor Index
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