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Isidro Urriza
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2010 – 2019
- 2019
- [c10]Jorge Villa, Alberto Mur, José Ignacio Artigas, Luis Angel Barragan, Isidro Urriza, Denis Navarro:
Output voltage estimation of a half-bridge inverter for domestic induction heating applications. IECON 2019: 5081-5086 - 2015
- [j10]Óscar Jiménez, Oscar Lucía
, Isidoro Urriza
, Luis Angel Barragan, Denis Navarro, Venkata Dinavahi
:
Implementation of an FPGA-Based Online Hardware-in-the-Loop Emulator Using High-Level Synthesis Tools for Resonant Power Converters Applied to Induction Heating Appliances. IEEE Trans. Ind. Electron. 62(4): 2206-2214 (2015) - [c9]Alberto Domínguez, Luis Angel Barragan, José Ignacio Artigas
, Aránzazu Otín
, Isidoro Urriza
, Denis Navarro:
Reduced-order model of a half-bridge series resonant inverter for power control in domestic induction heating applications. ICIT 2015: 2542-2547 - 2014
- [j9]Óscar Jiménez, Oscar Lucía
, Isidoro Urriza
, Luis Angel Barragan, Denis Navarro:
Design and Evaluation of a Low-Cost High-Performance ΣΔ ADC for Embedded Control Systems in Induction Heating Appliances. IEEE Trans. Ind. Electron. 61(5): 2601-2611 (2014) - [j8]Óscar Jiménez, Oscar Lucía
, Isidoro Urriza
, Luis Angel Barragan, Denis Navarro:
Analysis and Implementation of FPGA-Based Online Parametric Identification Algorithms for Resonant Power Converters. IEEE Trans. Ind. Informatics 10(2): 1144-1153 (2014) - [c8]Alberto Dominguez Vicente, Luis Angel Barragan, Aránzazu Otín
, José Ignacio Artigas
, Isidoro Urriza, Denis Navarro:
Small-signal model of dual half-bridge series resonant inverter sharing resonant capacitor for domestic induction heating. IECON 2014: 3277-3282 - 2013
- [j7]Denis Navarro, Oscar Lucía
, Luis Angel Barragan, Isidoro Urriza
, Óscar Jiménez:
High-Level Synthesis for Accelerating the FPGA Implementation of Computationally Demanding Control Algorithms for Power Converters. IEEE Trans. Ind. Informatics 9(3): 1371-1379 (2013) - [j6]Óscar Jiménez, Oscar Lucía
, Luis Angel Barragan, Denis Navarro, José Ignacio Artigas
, Isidoro Urriza
:
FPGA-Based Test-Bench for Resonant Inverter Load Characterization. IEEE Trans. Ind. Informatics 9(3): 1645-1654 (2013) - [c7]Alberto Domínguez, Aránzazu Otín
, Luis Angel Barragan, José Ignacio Artigas
, Denis Navarro, Isidoro Urriza
:
Frequency-to-output-power transfer function measurement of a resonant inverter for domestic induction heating applications. IECON 2013: 5034-5039 - 2012
- [c6]Óscar Jiménez, Oscar Lucía
, Isidoro Urriza
, Luis Angel Barragan, José Ignacio Artigas
, Denis Navarro:
FPGA-based 2nd-order sigma-delta A/D converter for current measurement for resonant power converters. IECON 2012: 3061-3066 - [c5]Denis Navarro, Oscar Lucía
, Isidro Urriza
, Luis Angel Barragan, Óscar Jiménez:
Modeling and simulation of power converter systems using SystemC system-level description language. IECON 2012: 4694-4699 - 2011
- [j5]Oscar Lucía
, Luis Angel Barragan, José M. Burdio
, Óscar Jiménez, Denis Navarro, Isidoro Urriza
:
A Versatile Power Electronics Test-Bench Architecture Applied to Domestic Induction Heating. IEEE Trans. Ind. Electron. 58(3): 998-1007 (2011) - 2010
- [j4]Isidoro Urriza
, Luis Angel Barragan, Denis Navarro, José Ignacio Artigas
, Oscar Lucía
:
Word Length Selection Method for Controller Implementation on FPGAs Using the VHDL-2008 Fixed-Point and Floating-Point Packages. EURASIP J. Embed. Syst. 2010 (2010)
2000 – 2009
- 2009
- [j3]José Ignacio Artigas
, Isidoro Urriza
, Jesús Acero
, Luis Angel Barragan, Denis Navarro, José M. Burdio
:
Power Measurement by Output-Current Integration in Series Resonant Inverters. IEEE Trans. Ind. Electron. 56(2): 559-567 (2009) - 2008
- [j2]Luis Angel Barragan, Denis Navarro, Jesús Acero
, Isidoro Urriza
, José M. Burdio
:
FPGA Implementation of a Switching Frequency Modulation Circuit for EMI Reduction in Resonant Inverters for Induction Heating Appliances. IEEE Trans. Ind. Electron. 55(1): 11-20 (2008) - 2002
- [c4]Alfredo Sanz, José I. García-Nicolás, Isidoro Urriza:
Implementing Converters in FPLD. FPL 2002: 966-975 - 2001
- [j1]Isidoro Urriza, José Ignacio Artigas, Luis Angel Barragan, J. I. García, Denis Navarro:
VLSI Implementation of Discrete Wavelet Transform for Lossless Compression of Medical Images. Real Time Imaging 7(2): 203-217 (2001) - [c3]Isidoro Urriza, José I. García-Nicolás, Alfredo Sanz, Antonio Valdovinos:
A System on Chip for Power Line Communications According to European Home Systems Specifications. FPL 2001: 658-662
1990 – 1999
- 1998
- [c2]Isidoro Urriza
, José Ignacio Artigas
, José I. García-Nicolás, Luis Angel Barragan, Denis Navarro:
VLSI Architecture for Lossless Compression of Medical Images Using the Discrete Wavelet Transform. DATE 1998: 196-201 - 1997
- [c1]Isidoro Urriza, J. I. García, Denis Navarro:
Instruction issue system for superscalar processors. PDP 1997: 108-115
Coauthor Index
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