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Journal Articles
- 2019
[j4]Derong Liu
, Bei Yu, Vinicius S. Livramento, Salim Chowdhury, Duo Ding, Huy Vo, Akshay Sharma, David Z. Pan:
Synergistic Topology Generation and Route Synthesis for On-Chip Performance-Critical Signal Groups. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(6): 1147-1160 (2019)- 2018
- [j3]Derong Liu, Bei Yu, Salim Chowdhury, David Z. Pan:
TILA-S: Timing-Driven Incremental Layer Assignment Avoiding Slew Violations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37(1): 231-244 (2018) - 2017
- [j2]Vinicius S. Livramento, Derong Liu, Salim Chowdhury, Bei Yu, Xiaoqing Xu, David Z. Pan, José Luís Almada Güntzel, Luiz C. V. dos Santos:
Incremental Layer Assignment Driven by an External Signoff Timing Engine. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(7): 1126-1139 (2017) - [j1]Derong Liu, Bei Yu, Salim Chowdhury, David Z. Pan:
Incremental Layer Assignment for Timing Optimization. ACM Trans. Design Autom. Electr. Syst. 22(4): 75:1-75:25 (2017)
Conference and Workshop Papers
- 2017
- [c14]Derong Liu, Vinicius S. Livramento, Salim Chowdhury, Duo Ding, Huy Vo, Akshay Sharma, David Z. Pan:
Streak: Synergistic Topology Generation and Route Synthesis for On-Chip Performance-Critical Signal Groups. DAC 2017: 18:1-18:6 - 2016
- [c13]Derong Liu, Bei Yu, Salim Chowdhury, David Z. Pan:
Incremental layer assignment for critical path timing. DAC 2016: 85:1-85:6 - 2015
- [c12]Bei Yu, Derong Liu, Salim Chowdhury, David Z. Pan:
TILA: Timing-Driven Incremental Layer Assignment. ICCAD 2015: 110-117 - 2014
- [c11]Yilin Zhang, Salim Chowdhury, David Z. Pan:
BOB-router: A new buffering-aware global router with over-the-block routing resources optimization. ASP-DAC 2014: 513-518 - 2012
- [c10]Yilin Zhang, Ashutosh Chakraborty, Salim Chowdhury, David Z. Pan:
Reclaiming over-the-IP-block routing resources with buffering-aware rectilinear Steiner minimum tree construction. ICCAD 2012: 137-143 - 2007
- [c9]Salim Chowdhury, John Lillis:
Repeater insertion for concurrent setup and hold time violations with power-delay trade-off. ISPD 2007: 59-66 - 1999
- [c8]Arani Sinha, Salim Chowdhury:
Mesh-structured on-chip power/ground: design for minimum inductance and characterization for fast R, L extraction. CICC 1999: 461-465 - 1994
- [c7]Monjurul Haque, Ali El-Zein, Salim Chowdhury:
A New Time-Domain Macromodel for Transient Simulation of Uniform/Nonuniform Multiconductor Transmission-Line Interconnections. DAC 1994: 628-633 - [c6]Ali El-Zein, Monjurul Haque, Salim Chowdhury:
Simulating Uniform Lossy Lines by the Time-Domain Modal Analysis. ICCD 1994: 567-570 - [c5]Ali El-Zein, Monjurul Haque, Salim Chowdhury:
Simulating Nonuniform Lossy Lines with Frequency Dependent Parameters by the Method of Characteristics. ISCAS 1994: 327-330 - [c4]Monjurul Haque, Ali El-Zein, Salim Chowdhury:
Transient Simulation of Nonuniform Transmission Lines by Asymptotic Waveform Evaluation. ISCAS 1994: 331-334 - 1993
- [c3]Monjurul Haque, Salim Chowdhury:
Analysis and Reliable Design of ECL Circuits with Distributed RLC Interconnections. DAC 1993: 697-701 - [c2]Ali El-Zein, Salim Chowdhury:
Maximum crosstalk in a transmission line system with linear time-invariant terminal networks. ISCAS 1993: 2295-2298 - 1992
- [c1]Ali El-Zein, Salim Chowdhury:
An analytical method for finding the maximum crosstalk in lossless-coupled transmission lines. ICCAD 1992: 443-448
Coauthor Index
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