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Conference and Workshop Papers
- 2023
[c5]Ram Venkat Narayanan, Aparajithan Nathamuni Venkatesan, Kishore Pula, Sundarakumar Muthukumaran, Ranga Vemuri:
Reverse Engineering Word-Level Models from Look-Up Table Netlists. ISQED 2023: 1-8- [c4]Sundarakumar Muthukumaran, Aparajithan Nathamuni Venkatesan, Kishore Pula, Ram Venkat Narayanan, Ranga Vemuri, John Marty Emmert:
Reverse Engineering of RTL Controllers from Look-Up Table Netlists. ISVLSI 2023: 1-6 - [c3]Kishore Pula, Aparajithan Nathamuni Venkatesan, Ram Venkat Narayanan, Sundarakumar Muthukumaran, Ranga Vemuri, John Marty Emmert:
RELUT-GNN: Reverse Engineering Data Path Elements From LUT Netlists Using Graph Neural Networks. MWSCAS 2023: 511-515 - [c2]Aparajithan Nathamuni Venkatesan, Ram Venkat Narayanan, Kishore Pula, Sundarakumar Muthukumaran, Ranga Vemuri:
Word-Level Structure Identification In FPGA Designs Using Cell Proximity Information. VLSID 2023: 389-394 - 2021
- [c1]Nikhil Saxena
, Ram Venkat Narayanan, Juneet Kumar Meka, Ranga Vemuri:
SRTLock: A Sensitivity Resilient Two-Tier Logic Encryption Scheme. iSES 2021: 389-394
Informal and Other Publications
- 2023
- [i2]Ram Venkat Narayanan, Aparajithan Nathamuni Venkatesan, Kishore Pula, Sundarakumar Muthukumaran, Ranga Vemuri:
Reverse Engineering Word-Level Models from Look-Up Table Netlists. CoRR abs/2303.02762 (2023) - [i1]Aparajithan Nathamuni Venkatesan, Ram Venkat Narayanan, Kishore Pula, Sundarakumar Muthukumaran, Ranga Vemuri:
Word-Level Structure Identification In FPGA Designs Using Cell Proximity Information. CoRR abs/2303.07405 (2023)
Coauthor Index
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