Wenbo Liu

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

◀ ▶ joint publications with Juo-Jung Hung

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Publications

2013
[j2]
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  - https://dblp.org/rec/journals/jssc/WuCLHLSTCHHHJTV13
Jiangfeng Wu, Chun-Ying Chen, Tianwei Li, Lin He, Wenbo Liu, Wei-Ta Shih, Shauhyuarn Sean Tsai, Binning Chen, Chun-Sheng Huang, Bryan Juo-Jung Hung, Hing T. Hung, Steven Jaffe, Loke Kun Tan, Hung Vu:
A 240-mW 2.1-GS/s 52-dB SNDR Pipeline ADC Using MDAC Equalization. IEEE J. Solid State Circuits 48(8): 1818-1828 (2013)
2012
[j1]
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  - journals/jssc/ChenWHLLS12
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Chun-Ying Chen, Jiangfeng Wu, Juo-Jung Hung, Tianwei Li, Wenbo Liu, Wei-Ta Shih:
A 12-Bit 3 GS/s Pipeline ADC With 0.4 mm² and 500 mW in 40 nm Digital CMOS. IEEE J. Solid State Circuits 47(4): 1013-1021 (2012)
[c7]
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Jiangfeng Wu, Chun-Ying Chen, Tianwei Li, Wenbo Liu, Lin He, Shauhyuarn Sean Tsai, Binning Chen, Chun-Sheng Huang, Juo-Jung Hung, Wei-Ta Shih, Hing T. Hung, Steven Jaffe, Loke Tan, Hung Vu:
A 240mW 2.1GS/s 12b pipeline ADC using MDAC equalization. CICC 2012: 1-4

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