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Victor Lomné
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Publications
- 2016
- [j3]Florent Bruguier, Pascal Benoit, Lionel Torres, Lyonel Barthe, Morgan Bourree, Victor Lomné:
Cost-Effective Design Strategies for Securing Embedded Processors. IEEE Trans. Emerg. Top. Comput. 4(1): 60-72 (2016) - 2012
- [j1]Amine Dehbaoui, Victor Lomné, Thomas Ordas, Lionel Torres, Michel Robert, Philippe Maurine:
Enhancing Electromagnetic Analysis Using Magnitude Squared Incoherence. IEEE Trans. Very Large Scale Integr. Syst. 20(3): 573-577 (2012) - 2010
- [c7]Victor Lomné, Amine Dehbaoui, Philippe Maurine, Lionel Torres, Michel Robert:
Differential Power Analysis enhancement with statistical preprocessing. DATE 2010: 1301-1304 - [c6]Victor Lomné, Philippe Maurine, Lionel Torres, Thomas Ordas, Mathieu Lisart, Jérome Toublanc:
Modeling Time Domain Magnetic Emissions of ICs. PATMOS 2010: 238-249 - [c5]Rafael Soares, Ney Laert Vilar Calazans, Victor Lomné, Amine Dehbaoui, Philippe Maurine, Lionel Torres:
A GALS pipeline DES architecture to increase robustness against DPA and DEMA attacks. SBCCI 2010: 115-120 - 2009
- [c4]Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert, Rafael Soares, Ney Calazans:
Evaluation on FPGA of triple rail logic robustness against DPA and DEMA. DATE 2009: 634-639 - [c3]Amine Dehbaoui, Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert:
Enhancing Electromagnetic Attacks Using Spectral Coherence Based Cartography. VLSI-SoC 2009: 135-155 - 2008
- [c2]Victor Lomné, Thomas Ordas, Philippe Maurine, Lionel Torres, Michel Robert, Rafael Soares, Ney Calazans:
Triple Rail Logic Robustness against DPA. ReConFig 2008: 415-420 - [c1]Rafael Soares, Ney Laert Vilar Calazans, Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert:
Evaluating the robustness of secure triple track logic through prototyping. SBCCI 2008: 193-198
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