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Jean Davies Lesser

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1980 – 1989

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1980
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Jean Davies Lesser, John J. Shedletsky:
An Experimental Delay Test Generator for LSI Logic. IEEE Trans. Computers 29(3): 235-248 (1980)

1970 – 1979

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1977
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Barbara J. Agule, Jean Davies Lesser, Albert E. Ruehli, Peter K. Wolff Sr.:
An experimental system for power/timing optimization of LSI chips. DAC 1977: 147-152

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