BibTeX records: Chul-Hong Park

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Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
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@article{DBLP:journals/tcad/ChoiJKKPPY24,
  author       = {Suhyeong Choi and
                  Jinwook Jung and
                  Andrew B. Kahng and
                  Minsoo Kim and
                  Chul{-}Hong Park and
                  Bodhisatta Pramanik and
                  Dooseok Yoon},
  title        = {{PROBE3.0:} {A} Systematic Framework for Design-Technology Pathfinding
                  With Improved Design Enablement},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {43},
  number       = {4},
  pages        = {1218--1231},
  year         = {2024},
  url          = {https://doi.org/10.1109/TCAD.2023.3334591},
  doi          = {10.1109/TCAD.2023.3334591},
  timestamp    = {Sun, 04 Aug 2024 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/ChoiJKKPPY24.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/corr/abs-2304-13215,
  author       = {Suhyeong Choi and
                  Jinwook Jung and
                  Andrew B. Kahng and
                  Minsoo Kim and
                  Chul{-}Hong Park and
                  Bodhisatta Pramanik and
                  Dooseok Yoon},
  title        = {{PROBE3.0:} {A} Systematic Framework for Design-Technology Pathfinding
                  with Improved Design Enablement},
  journal      = {CoRR},
  volume       = {abs/2304.13215},
  year         = {2023},
  url          = {https://doi.org/10.48550/arXiv.2304.13215},
  doi          = {10.48550/ARXIV.2304.13215},
  eprinttype    = {arXiv},
  eprint       = {2304.13215},
  timestamp    = {Wed, 03 May 2023 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/corr/abs-2304-13215.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isscc/SongKRKPPHYDLLK17,
  author       = {Taejoong Song and
                  Hoonki Kim and
                  Woojin Rim and
                  Yongho Kim and
                  Sunghyun Park and
                  Changnam Park and
                  Minsun Hong and
                  Giyong Yang and
                  Jeongho Do and
                  Jinyoung Lim and
                  Seungyoung Lee and
                  Ingyum Kim and
                  Sanghoon Baek and
                  Jonghoon Jung and
                  Daewon Ha and
                  Hyungsoon Jang and
                  Taejung Lee and
                  Chul{-}Hong Park and
                  Bongjae Kwon and
                  Hyuntaek Jung and
                  Sungwee Cho and
                  Yongjae Choo and
                  Jaeseung Choi},
  title        = {12.2 {A} 7nm FinFET {SRAM} macro using {EUV} lithography for peripheral
                  repair analysis},
  booktitle    = {2017 {IEEE} International Solid-State Circuits Conference, {ISSCC}
                  2017, San Francisco, CA, USA, February 5-9, 2017},
  pages        = {208--209},
  publisher    = {{IEEE}},
  year         = {2017},
  url          = {https://doi.org/10.1109/ISSCC.2017.7870334},
  doi          = {10.1109/ISSCC.2017.7870334},
  timestamp    = {Fri, 14 Aug 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/isscc/SongKRKPPHYDLLK17.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/ParkPL11,
  author       = {Chul{-}Hong Park and
                  David Z. Pan and
                  Kevin Lucas},
  title        = {Exploration of {VLSI} {CAD} researches for early design rule evaluation},
  booktitle    = {Proceedings of the 16th Asia South Pacific Design Automation Conference,
                  {ASP-DAC} 2011, Yokohama, Japan, January 25-27, 2011},
  pages        = {405--406},
  publisher    = {{IEEE}},
  year         = {2011},
  url          = {https://doi.org/10.1109/ASPDAC.2011.5722223},
  doi          = {10.1109/ASPDAC.2011.5722223},
  timestamp    = {Wed, 16 Oct 2019 14:14:52 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/ParkPL11.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/ieicet/ChoiPPLYCK10,
  author       = {Soo{-}Han Choi and
                  Young Hee Park and
                  Chul{-}Hong Park and
                  Sang Hoon Lee and
                  Moon{-}Hyun Yoo and
                  Jun Dong Cho and
                  Gyu Tae Kim},
  title        = {Suppression of Edge Effects Based on Analytic Model for Leakage Current
                  Reduction of Sub-40 nm {DRAM} Device},
  journal      = {{IEICE} Trans. Electron.},
  volume       = {93-C},
  number       = {5},
  pages        = {658--661},
  year         = {2010},
  url          = {https://doi.org/10.1587/transele.E93.C.658},
  doi          = {10.1587/TRANSELE.E93.C.658},
  timestamp    = {Mon, 26 Oct 2020 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/ieicet/ChoiPPLYCK10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/KahngPXY10,
  author       = {Andrew B. Kahng and
                  Chul{-}Hong Park and
                  Xu Xu and
                  Hailong Yao},
  title        = {Layout Decomposition Approaches for Double Patterning Lithography},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {29},
  number       = {6},
  pages        = {939--952},
  year         = {2010},
  url          = {https://doi.org/10.1109/TCAD.2010.2048374},
  doi          = {10.1109/TCAD.2010.2048374},
  timestamp    = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/KahngPXY10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/JeongKPY10,
  author       = {Kwangok Jeong and
                  Andrew B. Kahng and
                  Chul{-}Hong Park and
                  Hailong Yao},
  title        = {Dose Map and Placement Co-Optimization for Improved Timing Yield and
                  Leakage Power},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {29},
  number       = {7},
  pages        = {1070--1082},
  year         = {2010},
  url          = {https://doi.org/10.1109/TCAD.2010.2048397},
  doi          = {10.1109/TCAD.2010.2048397},
  timestamp    = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/JeongKPY10.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/todaes/KahngPSW09,
  author       = {Andrew B. Kahng and
                  Chul{-}Hong Park and
                  Puneet Sharma and
                  Qinke Wang},
  title        = {Lens aberration aware placement for timing yield},
  journal      = {{ACM} Trans. Design Autom. Electr. Syst.},
  volume       = {14},
  number       = {1},
  pages        = {16:1--16:26},
  year         = {2009},
  url          = {https://doi.org/10.1145/1455229.1455245},
  doi          = {10.1145/1455229.1455245},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/journals/todaes/KahngPSW09.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/KahngPX08,
  author       = {Andrew B. Kahng and
                  Chul{-}Hong Park and
                  Xu Xu},
  title        = {Fast Dual-Graph-Based Hotspot Filtering},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {27},
  number       = {9},
  pages        = {1635--1642},
  year         = {2008},
  url          = {https://doi.org/10.1109/TCAD.2008.927765},
  doi          = {10.1109/TCAD.2008.927765},
  timestamp    = {Thu, 24 Sep 2020 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/KahngPX08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/dac/JeongKPY08,
  author       = {Kwangok Jeong and
                  Andrew B. Kahng and
                  Chul{-}Hong Park and
                  Hailong Yao},
  editor       = {Limor Fix},
  title        = {Dose map and placement co-optimization for timing yield enhancement
                  and leakage power reduction},
  booktitle    = {Proceedings of the 45th Design Automation Conference, {DAC} 2008,
                  Anaheim, CA, USA, June 8-13, 2008},
  pages        = {516--521},
  publisher    = {{ACM}},
  year         = {2008},
  url          = {https://doi.org/10.1145/1391469.1391600},
  doi          = {10.1145/1391469.1391600},
  timestamp    = {Tue, 06 Nov 2018 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/dac/JeongKPY08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/iccad/KahngPXY08,
  author       = {Andrew B. Kahng and
                  Chul{-}Hong Park and
                  Xu Xu and
                  Hailong Yao},
  editor       = {Sani R. Nassif and
                  Jaijeet S. Roychowdhury},
  title        = {Layout decomposition for double patterning lithography},
  booktitle    = {2008 International Conference on Computer-Aided Design, {ICCAD} 2008,
                  San Jose, CA, USA, November 10-13, 2008},
  pages        = {465--472},
  publisher    = {{IEEE} Computer Society},
  year         = {2008},
  url          = {https://doi.org/10.1109/ICCAD.2008.4681616},
  doi          = {10.1109/ICCAD.2008.4681616},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/iccad/KahngPXY08.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/GuptaKP07,
  author       = {Puneet Gupta and
                  Andrew B. Kahng and
                  Chul{-}Hong Park},
  title        = {Detailed Placement for Enhanced Control of Resist and Etch CDs},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {26},
  number       = {12},
  pages        = {2144--2157},
  year         = {2007},
  url          = {https://doi.org/10.1109/TCAD.2007.906998},
  doi          = {10.1109/TCAD.2007.906998},
  timestamp    = {Thu, 28 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/GuptaKP07.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@article{DBLP:journals/tcad/GuptaKPSX06,
  author       = {Puneet Gupta and
                  Andrew B. Kahng and
                  Chul{-}Hong Park and
                  Kambiz Samadi and
                  Xu Xu},
  title        = {Wafer Topography-Aware Optical Proximity Correction},
  journal      = {{IEEE} Trans. Comput. Aided Des. Integr. Circuits Syst.},
  volume       = {25},
  number       = {12},
  pages        = {2747--2756},
  year         = {2006},
  url          = {https://doi.org/10.1109/TCAD.2006.882604},
  doi          = {10.1109/TCAD.2006.882604},
  timestamp    = {Thu, 28 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/journals/tcad/GuptaKPSX06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/date/KahngPSW06,
  author       = {Andrew B. Kahng and
                  Chul{-}Hong Park and
                  Puneet Sharma and
                  Qinke Wang},
  editor       = {Georges G. E. Gielen},
  title        = {Lens aberration aware timing-driven placement},
  booktitle    = {Proceedings of the Conference on Design, Automation and Test in Europe,
                  {DATE} 2006, Munich, Germany, March 6-10, 2006},
  pages        = {890--895},
  publisher    = {European Design and Automation Association, Leuven, Belgium},
  year         = {2006},
  url          = {https://doi.org/10.1109/DATE.2006.243803},
  doi          = {10.1109/DATE.2006.243803},
  timestamp    = {Fri, 24 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/date/KahngPSW06.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/aspdac/GuptaKP05,
  author       = {Puneet Gupta and
                  Andrew B. Kahng and
                  Chul{-}Hong Park},
  editor       = {Tingao Tang},
  title        = {Detailed placement for improved depth of focus and {CD} control},
  booktitle    = {Proceedings of the 2005 Conference on Asia South Pacific Design Automation,
                  {ASP-DAC} 2005, Shanghai, China, January 18-21, 2005},
  pages        = {343--348},
  publisher    = {{ACM} Press},
  year         = {2005},
  url          = {https://doi.org/10.1145/1120725.1120866},
  doi          = {10.1145/1120725.1120866},
  timestamp    = {Thu, 28 Oct 2021 01:00:00 +0200},
  biburl       = {https://dblp.org/rec/conf/aspdac/GuptaKP05.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isqed/ParkCRKPJPKYK02,
  author       = {Chul{-}Hong Park and
                  Soo{-}Han Choi and
                  Sang{-}Uhk Rhie and
                  Dong{-}Hyun Kim and
                  Jun{-}Seong Park and
                  Tae{-}Hwang Jang and
                  Ji{-}Soong Park and
                  Yoo{-}Hyon Kim and
                  Moon{-}Hyun Yoo and
                  Jeong{-}Taek Kong},
  title        = {A Hybrid {PPC} Method Based on the Empirical Etch Model for the 0.14{\(\mathrm{\mu}\)}m
                  {DRAM} Generation and Beyond},
  booktitle    = {3rd International Symposium on Quality of Electronic Design, {ISQED}
                  2002, San Jose, CA, USA, March 18-21, 2002},
  pages        = {143--147},
  publisher    = {{IEEE} Computer Society},
  year         = {2002},
  url          = {https://doi.org/10.1109/ISQED.2002.996717},
  doi          = {10.1109/ISQED.2002.996717},
  timestamp    = {Wed, 16 Oct 2019 14:14:55 +0200},
  biburl       = {https://dblp.org/rec/conf/isqed/ParkCRKPJPKYK02.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

@inproceedings{DBLP:conf/isqed/ParkPRKYKKY00,
  author       = {Ji{-}Soong Park and
                  Chul{-}Hong Park and
                  Sang{-}Uhk Rhie and
                  Yoo{-}Hyon Kim and
                  Moon{-}Hyun Yoo and
                  Jeong{-}Taek Kong and
                  Hyung{-}Woo Kim and
                  Sun{-}Il Yoo},
  title        = {An Efficient Rule-Based {OPC} Approach Using a {DRC} Tool for 0.18mum
                  {ASIC}},
  booktitle    = {1st International Symposium on Quality of Electronic Design {(ISQED}
                  2000), 20-22 March 2000, San Jose, CA, {USA}},
  pages        = {81--86},
  publisher    = {{IEEE} Computer Society},
  year         = {2000},
  url          = {https://doi.org/10.1109/ISQED.2000.838858},
  doi          = {10.1109/ISQED.2000.838858},
  timestamp    = {Thu, 23 Mar 2023 00:00:00 +0100},
  biburl       = {https://dblp.org/rec/conf/isqed/ParkPRKYKKY00.bib},
  bibsource    = {dblp computer science bibliography, https://dblp.org}
}

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